Files
gem5/src/cpu/minor/pipeline.hh
Gabe Black 91d83cc8a1 misc: Standardize the way create() constructs SimObjects.
The create() method on Params structs usually instantiate SimObjects
using a constructor which takes the Params struct as a parameter
somehow. There has been a lot of needless variation in how that was
done, making it annoying to pass Params down to base classes. Some of
the different forms were:

const Params &
Params &
Params *
const Params *
Params const*

This change goes through and fixes up every constructor and every
create() method to use the const Params & form. We use a reference
because the Params struct should never be null. We use const because
neither the create method nor the consuming object should modify the
record of the parameters as they came in from the config. That would
make consuming them not idempotent, and make it impossible to tell what
the actual simulation configuration was since it would change from any
user visible form (config script, config.ini, dot pdf output).

Change-Id: I77453cba52fdcfd5f4eec92dfb0bddb5a9945f31
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35938
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2020-10-14 12:06:44 +00:00

144 lines
4.9 KiB
C++

/*
* Copyright (c) 2013-2014, 2017 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
* not be construed as granting a license to any other intellectual
* property including but not limited to intellectual property relating
* to a hardware implementation of the functionality of the software
* licensed hereunder. You may use the software subject to the license
* terms below provided that you ensure that this notice is replicated
* unmodified and in its entirety in all distributions of the software,
* modified or unmodified, in source code or in binary form.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met: redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer;
* redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution;
* neither the name of the copyright holders nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
*
* The constructed pipeline. Kept out of MinorCPU to keep the interface
* between the CPU and its grubby implementation details clean.
*/
#ifndef __CPU_MINOR_PIPELINE_HH__
#define __CPU_MINOR_PIPELINE_HH__
#include "cpu/minor/activity.hh"
#include "cpu/minor/cpu.hh"
#include "cpu/minor/decode.hh"
#include "cpu/minor/execute.hh"
#include "cpu/minor/fetch1.hh"
#include "cpu/minor/fetch2.hh"
#include "params/MinorCPU.hh"
#include "sim/ticked_object.hh"
namespace Minor
{
/**
* @namespace Minor
*
* Minor contains all the definitions within the MinorCPU apart from the CPU
* class itself
*/
/** The constructed pipeline. Kept out of MinorCPU to keep the interface
* between the CPU and its grubby implementation details clean. */
class Pipeline : public Ticked
{
protected:
MinorCPU &cpu;
/** Allow cycles to be skipped when the pipeline is idle */
bool allow_idling;
Latch<ForwardLineData> f1ToF2;
Latch<BranchData> f2ToF1;
Latch<ForwardInstData> f2ToD;
Latch<ForwardInstData> dToE;
Latch<BranchData> eToF1;
Execute execute;
Decode decode;
Fetch2 fetch2;
Fetch1 fetch1;
/** Activity recording for the pipeline. This is access through the CPU
* by the pipeline stages but belongs to the Pipeline as it is the
* cleanest place to initialise it */
MinorActivityRecorder activityRecorder;
public:
/** Enumerated ids of the 'stages' for the activity recorder */
enum StageId
{
/* A stage representing wakeup of the whole processor */
CPUStageId = 0,
/* Real pipeline stages */
Fetch1StageId, Fetch2StageId, DecodeStageId, ExecuteStageId,
Num_StageId /* Stage count */
};
/** True after drain is called but draining isn't complete */
bool needToSignalDrained;
public:
Pipeline(MinorCPU &cpu_, const MinorCPUParams &params);
public:
/** Wake up the Fetch unit. This is needed on thread activation esp.
* after quiesce wakeup */
void wakeupFetch(ThreadID tid);
/** Try to drain the CPU */
bool drain();
void drainResume();
/** Test to see if the CPU is drained */
bool isDrained();
/** A custom evaluate allows report in the right place (between
* stages and pipeline advance) */
void evaluate() override;
void minorTrace() const;
/** Functions below here are BaseCPU operations passed on to pipeline
* stages */
/** Return the IcachePort belonging to Fetch1 for the CPU */
MinorCPU::MinorCPUPort &getInstPort();
/** Return the DcachePort belonging to Execute for the CPU */
MinorCPU::MinorCPUPort &getDataPort();
/** To give the activity recorder to the CPU */
MinorActivityRecorder *getActivityRecorder() { return &activityRecorder; }
};
}
#endif /* __CPU_MINOR_PIPELINE_HH__ */