The System class has a few different arrays of values which each correspond to a thread of execution based on their position. This change collects them together into a single class to make managing them easier and less error prone. It also collects methods for manipulating those threads as an API for that class. This class acts as a collection point for thread based state which the System class can look into to get at all its state. It also acts as an interface for interacting with threads for other classes. This forces external consumers to use the API instead of accessing the individual arrays which improves consistency. Change-Id: Idc4575c5a0b56fe75f5c497809ad91c22bfe26cc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25144 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
448 lines
15 KiB
C++
448 lines
15 KiB
C++
/*
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* Copyright (c) 2010-2013,2018 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "dev/arm/timer_cpulocal.hh"
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#include "arch/arm/system.hh"
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#include "base/intmath.hh"
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#include "base/trace.hh"
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#include "debug/Checkpoint.hh"
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#include "debug/Timer.hh"
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#include "dev/arm/base_gic.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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CpuLocalTimer::CpuLocalTimer(Params *p)
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: BasicPioDevice(p, 0x38)
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{
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}
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void
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CpuLocalTimer::init()
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{
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auto p = params();
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// Initialize the timer registers for each per cpu timer
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for (int i = 0; i < sys->threads.size(); i++) {
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ThreadContext* tc = sys->threads[i];
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std::stringstream oss;
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oss << name() << ".timer" << i;
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localTimer.emplace_back(
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new Timer(oss.str(), this,
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p->int_timer->get(tc),
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p->int_watchdog->get(tc)));
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}
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BasicPioDevice::init();
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}
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CpuLocalTimer::Timer::Timer(const std::string &timer_name,
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CpuLocalTimer* _parent,
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ArmInterruptPin* int_timer,
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ArmInterruptPin* int_watchdog)
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: _name(timer_name), parent(_parent), intTimer(int_timer),
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intWatchdog(int_watchdog), timerControl(0x0), watchdogControl(0x0),
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rawIntTimer(false), rawIntWatchdog(false),
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rawResetWatchdog(false), watchdogDisableReg(0x0),
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pendingIntTimer(false), pendingIntWatchdog(false),
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timerLoadValue(0x0), watchdogLoadValue(0x0),
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timerZeroEvent([this]{ timerAtZero(); }, name()),
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watchdogZeroEvent([this]{ watchdogAtZero(); }, name())
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{
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}
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Tick
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CpuLocalTimer::read(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
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assert(pkt->getSize() == 4);
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Addr daddr = pkt->getAddr() - pioAddr;
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ContextID cpu_id = pkt->req->contextId();
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DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr);
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assert(cpu_id >= 0);
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assert(cpu_id < localTimer.size());
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if (daddr < Timer::Size)
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localTimer[cpu_id]->read(pkt, daddr);
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else
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panic("Tried to read CpuLocalTimer at offset %#x that doesn't exist\n", daddr);
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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void
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CpuLocalTimer::Timer::read(PacketPtr pkt, Addr daddr)
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{
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DPRINTF(Timer, "Reading from CpuLocalTimer at offset: %#x\n", daddr);
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Tick time;
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switch(daddr) {
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case TimerLoadReg:
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pkt->setLE<uint32_t>(timerLoadValue);
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break;
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case TimerCounterReg:
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DPRINTF(Timer, "Event schedule for timer %d, clock=%d, prescale=%d\n",
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timerZeroEvent.when(), parent->clockPeriod(),
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timerControl.prescalar);
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time = timerZeroEvent.when() - curTick();
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time = time / parent->clockPeriod() /
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power(16, timerControl.prescalar);
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DPRINTF(Timer, "-- returning counter at %d\n", time);
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pkt->setLE<uint32_t>(time);
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break;
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case TimerControlReg:
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pkt->setLE<uint32_t>(timerControl);
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break;
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case TimerIntStatusReg:
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pkt->setLE<uint32_t>(rawIntTimer);
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break;
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case WatchdogLoadReg:
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pkt->setLE<uint32_t>(watchdogLoadValue);
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break;
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case WatchdogCounterReg:
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DPRINTF(Timer,
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"Event schedule for watchdog %d, clock=%d, prescale=%d\n",
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watchdogZeroEvent.when(), parent->clockPeriod(),
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watchdogControl.prescalar);
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time = watchdogZeroEvent.when() - curTick();
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time = time / parent->clockPeriod() /
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power(16, watchdogControl.prescalar);
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DPRINTF(Timer, "-- returning counter at %d\n", time);
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pkt->setLE<uint32_t>(time);
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break;
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case WatchdogControlReg:
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pkt->setLE<uint32_t>(watchdogControl);
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break;
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case WatchdogIntStatusReg:
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pkt->setLE<uint32_t>(rawIntWatchdog);
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break;
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case WatchdogResetStatusReg:
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pkt->setLE<uint32_t>(rawResetWatchdog);
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break;
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case WatchdogDisableReg:
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panic("Tried to read from WatchdogDisableRegister\n");
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break;
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default:
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panic("Tried to read CpuLocalTimer at offset %#x\n", daddr);
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break;
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}
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}
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Tick
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CpuLocalTimer::write(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
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assert(pkt->getSize() == 4);
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Addr daddr = pkt->getAddr() - pioAddr;
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ContextID cpu_id = pkt->req->contextId();
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DPRINTF(Timer, "Writing to CpuLocalTimer at offset: %#x\n", daddr);
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assert(cpu_id >= 0);
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assert(cpu_id < localTimer.size());
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if (daddr < Timer::Size)
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localTimer[cpu_id]->write(pkt, daddr);
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else
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panic("Tried to write CpuLocalTimer at offset %#x that doesn't exist\n", daddr);
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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void
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CpuLocalTimer::Timer::write(PacketPtr pkt, Addr daddr)
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{
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DPRINTF(Timer, "Writing to CpuLocalTimer at offset: %#x\n", daddr);
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bool old_enable;
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bool old_wd_mode;
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uint32_t old_val;
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switch (daddr) {
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case TimerLoadReg:
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// Writing to this register also resets the counter register and
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// starts decrementing if the counter is enabled.
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timerLoadValue = pkt->getLE<uint32_t>();
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restartTimerCounter(timerLoadValue);
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break;
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case TimerCounterReg:
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// Can be written, doesn't start counting unless the timer is enabled
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restartTimerCounter(pkt->getLE<uint32_t>());
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break;
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case TimerControlReg:
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old_enable = timerControl.enable;
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timerControl = pkt->getLE<uint32_t>();
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if ((old_enable == 0) && timerControl.enable)
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restartTimerCounter(timerLoadValue);
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break;
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case TimerIntStatusReg:
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rawIntTimer = false;
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if (pendingIntTimer) {
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pendingIntTimer = false;
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DPRINTF(Timer, "Clearing interrupt\n");
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}
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break;
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case WatchdogLoadReg:
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watchdogLoadValue = pkt->getLE<uint32_t>();
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restartWatchdogCounter(watchdogLoadValue);
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break;
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case WatchdogCounterReg:
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// Can't be written when in watchdog mode, but can in timer mode
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if (!watchdogControl.watchdogMode) {
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restartWatchdogCounter(pkt->getLE<uint32_t>());
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}
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break;
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case WatchdogControlReg:
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old_enable = watchdogControl.enable;
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old_wd_mode = watchdogControl.watchdogMode;
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watchdogControl = pkt->getLE<uint32_t>();
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if ((old_enable == 0) && watchdogControl.enable)
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restartWatchdogCounter(watchdogLoadValue);
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// cannot disable watchdog using control register
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if ((old_wd_mode == 1) && watchdogControl.watchdogMode == 0)
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watchdogControl.watchdogMode = 1;
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break;
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case WatchdogIntStatusReg:
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rawIntWatchdog = false;
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if (pendingIntWatchdog) {
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pendingIntWatchdog = false;
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DPRINTF(Timer, "Clearing watchdog interrupt\n");
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}
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break;
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case WatchdogResetStatusReg:
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rawResetWatchdog = false;
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DPRINTF(Timer, "Clearing watchdog reset flag\n");
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break;
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case WatchdogDisableReg:
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old_val = watchdogDisableReg;
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watchdogDisableReg = pkt->getLE<uint32_t>();
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// if this sequence is observed, turn off watchdog mode
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if (old_val == 0x12345678 && watchdogDisableReg == 0x87654321)
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watchdogControl.watchdogMode = 0;
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break;
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default:
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panic("Tried to write CpuLocalTimer timer at offset %#x\n", daddr);
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break;
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}
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}
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//XXX: Two functions are needed because the control registers are different types
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void
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CpuLocalTimer::Timer::restartTimerCounter(uint32_t val)
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{
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DPRINTF(Timer, "Resetting timer counter with value %#x\n", val);
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if (!timerControl.enable)
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return;
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Tick time = parent->clockPeriod() * power(16, timerControl.prescalar);
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time *= val;
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if (timerZeroEvent.scheduled()) {
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DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n");
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parent->deschedule(timerZeroEvent);
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}
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parent->schedule(timerZeroEvent, curTick() + time);
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DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time);
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}
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void
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CpuLocalTimer::Timer::restartWatchdogCounter(uint32_t val)
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{
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DPRINTF(Timer, "Resetting watchdog counter with value %#x\n", val);
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if (!watchdogControl.enable)
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return;
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Tick time = parent->clockPeriod() * power(16, watchdogControl.prescalar);
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time *= val;
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if (watchdogZeroEvent.scheduled()) {
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DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n");
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parent->deschedule(watchdogZeroEvent);
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}
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parent->schedule(watchdogZeroEvent, curTick() + time);
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DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time);
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}
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//////
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void
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CpuLocalTimer::Timer::timerAtZero()
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{
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if (!timerControl.enable)
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return;
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DPRINTF(Timer, "Timer Counter reached zero\n");
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rawIntTimer = true;
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bool old_pending = pendingIntTimer;
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if (timerControl.intEnable)
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pendingIntTimer = true;
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if (pendingIntTimer && !old_pending) {
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DPRINTF(Timer, "-- Causing interrupt\n");
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intTimer->raise();
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}
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if (!timerControl.autoReload)
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return;
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else
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restartTimerCounter(timerLoadValue);
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}
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void
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CpuLocalTimer::Timer::watchdogAtZero()
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{
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if (!watchdogControl.enable)
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return;
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DPRINTF(Timer, "Watchdog Counter reached zero\n");
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rawIntWatchdog = true;
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bool old_pending = pendingIntWatchdog;
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// generates an interrupt only if the watchdog is in timer
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// mode.
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if (watchdogControl.intEnable && !watchdogControl.watchdogMode)
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pendingIntWatchdog = true;
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else if (watchdogControl.watchdogMode) {
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rawResetWatchdog = true;
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fatal("gem5 ARM Model does not support true watchdog operation!\n");
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//XXX: Should we ever support a true watchdog reset?
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}
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if (pendingIntWatchdog && !old_pending) {
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DPRINTF(Timer, "-- Causing interrupt\n");
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intWatchdog->raise();
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}
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if (watchdogControl.watchdogMode)
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return;
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else if (watchdogControl.autoReload)
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restartWatchdogCounter(watchdogLoadValue);
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}
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void
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CpuLocalTimer::Timer::serialize(CheckpointOut &cp) const
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{
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DPRINTF(Checkpoint, "Serializing Arm CpuLocalTimer\n");
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uint32_t timer_control_serial = timerControl;
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uint32_t watchdog_control_serial = watchdogControl;
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SERIALIZE_SCALAR(timer_control_serial);
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SERIALIZE_SCALAR(watchdog_control_serial);
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SERIALIZE_SCALAR(rawIntTimer);
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SERIALIZE_SCALAR(rawIntWatchdog);
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SERIALIZE_SCALAR(rawResetWatchdog);
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SERIALIZE_SCALAR(watchdogDisableReg);
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SERIALIZE_SCALAR(pendingIntTimer);
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SERIALIZE_SCALAR(pendingIntWatchdog);
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SERIALIZE_SCALAR(timerLoadValue);
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SERIALIZE_SCALAR(watchdogLoadValue);
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bool timer_is_in_event = timerZeroEvent.scheduled();
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SERIALIZE_SCALAR(timer_is_in_event);
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bool watchdog_is_in_event = watchdogZeroEvent.scheduled();
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SERIALIZE_SCALAR(watchdog_is_in_event);
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Tick timer_event_time;
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if (timer_is_in_event){
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timer_event_time = timerZeroEvent.when();
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SERIALIZE_SCALAR(timer_event_time);
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}
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Tick watchdog_event_time;
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if (watchdog_is_in_event){
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watchdog_event_time = watchdogZeroEvent.when();
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SERIALIZE_SCALAR(watchdog_event_time);
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}
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}
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void
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CpuLocalTimer::Timer::unserialize(CheckpointIn &cp)
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{
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DPRINTF(Checkpoint, "Unserializing Arm CpuLocalTimer\n");
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uint32_t timer_control_serial;
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UNSERIALIZE_SCALAR(timer_control_serial);
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timerControl = timer_control_serial;
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uint32_t watchdog_control_serial;
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UNSERIALIZE_SCALAR(watchdog_control_serial);
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watchdogControl = watchdog_control_serial;
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UNSERIALIZE_SCALAR(rawIntTimer);
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UNSERIALIZE_SCALAR(rawIntWatchdog);
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UNSERIALIZE_SCALAR(rawResetWatchdog);
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UNSERIALIZE_SCALAR(watchdogDisableReg);
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UNSERIALIZE_SCALAR(pendingIntTimer);
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UNSERIALIZE_SCALAR(pendingIntWatchdog);
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UNSERIALIZE_SCALAR(timerLoadValue);
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UNSERIALIZE_SCALAR(watchdogLoadValue);
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bool timer_is_in_event;
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UNSERIALIZE_SCALAR(timer_is_in_event);
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bool watchdog_is_in_event;
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UNSERIALIZE_SCALAR(watchdog_is_in_event);
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Tick timer_event_time;
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if (timer_is_in_event){
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UNSERIALIZE_SCALAR(timer_event_time);
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parent->schedule(timerZeroEvent, timer_event_time);
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}
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Tick watchdog_event_time;
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if (watchdog_is_in_event) {
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UNSERIALIZE_SCALAR(watchdog_event_time);
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parent->schedule(watchdogZeroEvent, watchdog_event_time);
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}
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}
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void
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CpuLocalTimer::serialize(CheckpointOut &cp) const
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{
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for (int i = 0; i < sys->threads.size(); i++)
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localTimer[i]->serializeSection(cp, csprintf("timer%d", i));
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}
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void
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CpuLocalTimer::unserialize(CheckpointIn &cp)
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{
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for (int i = 0; i < sys->threads.size(); i++)
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localTimer[i]->unserializeSection(cp, csprintf("timer%d", i));
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}
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CpuLocalTimer *
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CpuLocalTimerParams::create()
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{
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return new CpuLocalTimer(this);
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}
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