b5d22a80fd
This is an abstract class encapsulating the ITB and DTB (Instruction and Data TLBs) JIRA: https://gem5.atlassian.net/browse/GEM5-790 Change-Id: I7c8fa2ada319e631564182075da1aaff517ec212 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34975 Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com> Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
63 lines
2.4 KiB
Python
63 lines
2.4 KiB
Python
# -*- mode:python -*-
|
|
|
|
# Copyright (c) 2004-2005 The Regents of The University of Michigan
|
|
# All rights reserved.
|
|
#
|
|
# Redistribution and use in source and binary forms, with or without
|
|
# modification, are permitted provided that the following conditions are
|
|
# met: redistributions of source code must retain the above copyright
|
|
# notice, this list of conditions and the following disclaimer;
|
|
# redistributions in binary form must reproduce the above copyright
|
|
# notice, this list of conditions and the following disclaimer in the
|
|
# documentation and/or other materials provided with the distribution;
|
|
# neither the name of the copyright holders nor the names of its
|
|
# contributors may be used to endorse or promote products derived from
|
|
# this software without specific prior written permission.
|
|
#
|
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
Import('*')
|
|
|
|
if env['TARGET_ISA'] == 'sparc':
|
|
Source('asi.cc')
|
|
Source('decoder.cc')
|
|
Source('faults.cc')
|
|
Source('fs_workload.cc')
|
|
Source('interrupts.cc')
|
|
Source('isa.cc')
|
|
Source('linux/linux.cc')
|
|
Source('linux/process.cc')
|
|
Source('linux/syscalls.cc')
|
|
Source('mmu.cc')
|
|
Source('nativetrace.cc')
|
|
Source('pagetable.cc')
|
|
Source('process.cc')
|
|
Source('remote_gdb.cc')
|
|
Source('solaris/process.cc')
|
|
Source('solaris/solaris.cc')
|
|
Source('tlb.cc')
|
|
Source('ua2005.cc')
|
|
Source('utility.cc')
|
|
|
|
SimObject('SparcFsWorkload.py')
|
|
SimObject('SparcInterrupts.py')
|
|
SimObject('SparcISA.py')
|
|
SimObject('SparcMMU.py')
|
|
SimObject('SparcNativeTrace.py')
|
|
SimObject('SparcTLB.py')
|
|
|
|
DebugFlag('Sparc', "Generic SPARC ISA stuff")
|
|
DebugFlag('RegisterWindows', "Register window manipulation")
|
|
|
|
ISADesc('isa/main.isa')
|