src/arch/alpha/utility.hh:
src/arch/mips/utility.hh:
src/arch/sparc/utility.hh:
src/arch/x86/utility.hh:
add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi
src/arch/sparc/isa/decoder.isa:
handle writable bits of strandstatus register in miscregfile
src/arch/sparc/miscregfile.hh:
some constants for the strand status register
src/arch/sparc/ua2005.cc:
properly implement the strand status register
src/dev/sparc/iob.cc:
implement ipi generation properly
src/sim/system.cc:
call into the ISA to start the CPU (or not)
--HG--
extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
308 lines
8.0 KiB
C++
308 lines
8.0 KiB
C++
/*
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* Copyright (c) 2003-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Steve Reinhardt
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* Lisa Hsu
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* Nathan Binkert
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* Ali Saidi
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*/
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#include "arch/isa_traits.hh"
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#include "arch/remote_gdb.hh"
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#include "arch/utility.hh"
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#include "base/loader/object_file.hh"
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#include "base/loader/symtab.hh"
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#include "base/trace.hh"
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#include "cpu/thread_context.hh"
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#include "mem/mem_object.hh"
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#include "mem/physical.hh"
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#include "sim/builder.hh"
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#include "sim/byteswap.hh"
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#include "sim/system.hh"
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#if FULL_SYSTEM
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#include "arch/vtophys.hh"
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#include "kern/kernel_stats.hh"
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#endif
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using namespace std;
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using namespace TheISA;
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vector<System *> System::systemList;
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int System::numSystemsRunning = 0;
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System::System(Params *p)
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: SimObject(p->name), physmem(p->physmem), numcpus(0),
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#if FULL_SYSTEM
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init_param(p->init_param),
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functionalPort(p->name + "-fport"),
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virtPort(p->name + "-vport"),
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#else
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page_ptr(0),
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#endif
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memoryMode(p->mem_mode), _params(p)
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{
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// add self to global system list
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systemList.push_back(this);
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#if FULL_SYSTEM
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kernelSymtab = new SymbolTable;
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debugSymbolTable = new SymbolTable;
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/**
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* Get a functional port to memory
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*/
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Port *mem_port;
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mem_port = physmem->getPort("functional");
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functionalPort.setPeer(mem_port);
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mem_port->setPeer(&functionalPort);
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mem_port = physmem->getPort("functional");
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virtPort.setPeer(mem_port);
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mem_port->setPeer(&virtPort);
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/**
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* Load the kernel code into memory
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*/
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if (params()->kernel_path == "") {
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warn("No kernel set for full system simulation. Assuming you know what"
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" you're doing...\n");
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} else {
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// Load kernel code
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kernel = createObjectFile(params()->kernel_path);
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if (kernel == NULL)
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fatal("Could not load kernel file %s", params()->kernel_path);
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// Load program sections into memory
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kernel->loadSections(&functionalPort, LoadAddrMask);
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// setup entry points
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kernelStart = kernel->textBase();
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kernelEnd = kernel->bssBase() + kernel->bssSize();
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kernelEntry = kernel->entryPoint();
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// load symbols
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if (!kernel->loadGlobalSymbols(kernelSymtab))
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panic("could not load kernel symbols\n");
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if (!kernel->loadLocalSymbols(kernelSymtab))
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panic("could not load kernel local symbols\n");
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if (!kernel->loadGlobalSymbols(debugSymbolTable))
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panic("could not load kernel symbols\n");
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if (!kernel->loadLocalSymbols(debugSymbolTable))
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panic("could not load kernel local symbols\n");
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DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
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DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
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DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
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DPRINTF(Loader, "Kernel loaded...\n");
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}
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#endif // FULL_SYSTEM
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// increment the number of running systms
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numSystemsRunning++;
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}
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System::~System()
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{
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#if FULL_SYSTEM
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delete kernelSymtab;
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delete kernel;
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#else
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panic("System::fixFuncEventAddr needs to be rewritten "
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"to work with syscall emulation");
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#endif // FULL_SYSTEM}
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}
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int rgdb_wait = -1;
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int rgdb_enable = true;
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void
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System::setMemoryMode(MemoryMode mode)
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{
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assert(getState() == Drained);
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memoryMode = mode;
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}
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bool System::breakpoint()
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{
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if (remoteGDB.size())
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return remoteGDB[0]->breakpoint();
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return false;
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}
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int
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System::registerThreadContext(ThreadContext *tc, int id)
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{
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if (id == -1) {
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for (id = 0; id < threadContexts.size(); id++) {
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if (!threadContexts[id])
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break;
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}
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}
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if (threadContexts.size() <= id)
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threadContexts.resize(id + 1);
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if (threadContexts[id])
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panic("Cannot have two CPUs with the same id (%d)\n", id);
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threadContexts[id] = tc;
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numcpus++;
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if (rgdb_enable) {
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RemoteGDB *rgdb = new RemoteGDB(this, tc);
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GDBListener *gdbl = new GDBListener(rgdb, 7000 + id);
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gdbl->listen();
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/**
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* Uncommenting this line waits for a remote debugger to
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* connect to the simulator before continuing.
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*/
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if (rgdb_wait != -1 && rgdb_wait == id)
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gdbl->accept();
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if (remoteGDB.size() <= id) {
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remoteGDB.resize(id + 1);
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}
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remoteGDB[id] = rgdb;
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}
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return id;
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}
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void
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System::startup()
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{
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int i;
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for (i = 0; i < threadContexts.size(); i++)
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TheISA::startupCPU(threadContexts[i], i);
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}
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void
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System::replaceThreadContext(ThreadContext *tc, int id)
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{
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if (id >= threadContexts.size()) {
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panic("replaceThreadContext: bad id, %d >= %d\n",
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id, threadContexts.size());
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}
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threadContexts[id] = tc;
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if (id < remoteGDB.size())
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remoteGDB[id]->replaceThreadContext(tc);
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}
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#if !FULL_SYSTEM
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Addr
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System::new_page()
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{
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Addr return_addr = page_ptr << LogVMPageSize;
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++page_ptr;
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if (return_addr >= physmem->size())
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fatal("Out of memory, please increase size of physical memory.");
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return return_addr;
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}
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#endif
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void
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System::serialize(ostream &os)
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{
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#if FULL_SYSTEM
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kernelSymtab->serialize("kernel_symtab", os);
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#endif // FULL_SYSTEM
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}
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void
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System::unserialize(Checkpoint *cp, const string §ion)
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{
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#if FULL_SYSTEM
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kernelSymtab->unserialize("kernel_symtab", cp, section);
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#endif // FULL_SYSTEM
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}
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void
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System::printSystems()
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{
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vector<System *>::iterator i = systemList.begin();
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vector<System *>::iterator end = systemList.end();
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for (; i != end; ++i) {
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System *sys = *i;
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cerr << "System " << sys->name() << ": " << hex << sys << endl;
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}
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}
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void
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printSystems()
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{
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System::printSystems();
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}
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const char *System::MemoryModeStrings[3] = {"invalid", "atomic",
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"timing"};
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#if FULL_SYSTEM
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// In full system mode, only derived classes (e.g. AlphaLinuxSystem)
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// can be created directly.
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DEFINE_SIM_OBJECT_CLASS_NAME("System", System)
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#else
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(System)
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SimObjectParam<PhysicalMemory *> physmem;
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SimpleEnumParam<System::MemoryMode> mem_mode;
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END_DECLARE_SIM_OBJECT_PARAMS(System)
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BEGIN_INIT_SIM_OBJECT_PARAMS(System)
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INIT_PARAM(physmem, "physical memory"),
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INIT_ENUM_PARAM(mem_mode, "Memory Mode, (1=atomic, 2=timing)",
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System::MemoryModeStrings)
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END_INIT_SIM_OBJECT_PARAMS(System)
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CREATE_SIM_OBJECT(System)
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{
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System::Params *p = new System::Params;
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p->name = getInstanceName();
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p->physmem = physmem;
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p->mem_mode = mem_mode;
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return new System(p);
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}
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REGISTER_SIM_OBJECT("System", System)
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#endif
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