b4aefe4e86
Change-Id: Ib0383fc6d5f884fd6c020bcd938eee2f802ad412 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33935 Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
260 lines
8.3 KiB
C++
260 lines
8.3 KiB
C++
/*
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* Copyright (c) 2014 The University of Wisconsin
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*
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* Copyright (c) 2006 INRIA (Institut National de Recherche en
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* Informatique et en Automatique / French National Research Institute
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* for Computer Science and Applied Mathematics)
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CPU_PRED_LOOP_PREDICTOR_HH__
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#define __CPU_PRED_LOOP_PREDICTOR_HH__
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#include "base/statistics.hh"
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#include "base/types.hh"
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#include "sim/sim_object.hh"
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struct LoopPredictorParams;
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class LoopPredictor : public SimObject
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{
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protected:
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const unsigned logSizeLoopPred;
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const unsigned loopTableAgeBits;
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const unsigned loopTableConfidenceBits;
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const unsigned loopTableTagBits;
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const unsigned loopTableIterBits;
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const unsigned logLoopTableAssoc;
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const uint8_t confidenceThreshold;
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const uint16_t loopTagMask;
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const uint16_t loopNumIterMask;
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const int loopSetMask;
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// Prediction Structures
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// Loop Predictor Entry
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struct LoopEntry
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{
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uint16_t numIter;
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uint16_t currentIter;
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uint16_t currentIterSpec; // only for useSpeculation
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uint8_t confidence;
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uint16_t tag;
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uint8_t age;
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bool dir; // only for useDirectionBit
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LoopEntry() : numIter(0), currentIter(0), currentIterSpec(0),
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confidence(0), tag(0), age(0), dir(0) { }
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};
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LoopEntry *ltable;
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int8_t loopUseCounter;
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unsigned withLoopBits;
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const bool useDirectionBit;
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const bool useSpeculation;
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const bool useHashing;
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const bool restrictAllocation;
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const unsigned initialLoopIter;
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const unsigned initialLoopAge;
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const bool optionalAgeReset;
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struct LoopPredictorStats : public Stats::Group {
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LoopPredictorStats(Stats::Group *parent);
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Stats::Scalar correct;
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Stats::Scalar wrong;
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} stats;
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/**
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* Updates an unsigned counter based on up/down parameter
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* @param ctr Reference to counter to update.
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* @param up Boolean indicating if the counter is incremented/decremented
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* If true it is incremented, if false it is decremented
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* @param nbits Counter width.
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*/
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static inline void unsignedCtrUpdate(uint8_t &ctr, bool up, unsigned nbits)
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{
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assert(nbits <= sizeof(uint8_t) << 3);
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if (up) {
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if (ctr < ((1 << nbits) - 1))
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ctr++;
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} else {
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if (ctr)
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ctr--;
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}
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}
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static inline void signedCtrUpdate(int8_t &ctr, bool up, unsigned nbits)
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{
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if (up) {
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if (ctr < ((1 << (nbits - 1)) - 1))
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ctr++;
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} else {
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if (ctr > -(1 << (nbits - 1)))
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ctr--;
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}
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}
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public:
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// Primary branch history entry
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struct BranchInfo
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{
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uint16_t loopTag;
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uint16_t currentIter;
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bool loopPred;
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bool loopPredValid;
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bool loopPredUsed;
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int loopIndex;
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int loopIndexB; // only for useHashing
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int loopHit;
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bool predTaken;
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BranchInfo()
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: loopTag(0), currentIter(0),
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loopPred(false),
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loopPredValid(false), loopIndex(0), loopIndexB(0), loopHit(0),
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predTaken(false)
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{}
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};
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/**
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* Computes the index used to access the
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* loop predictor.
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* @param pc_in The unshifted branch PC.
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* @param instShiftAmt Shift the pc by as many bits
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*/
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int lindex(Addr pc_in, unsigned instShiftAmt) const;
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/**
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* Computes the index used to access the
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* ltable structures.
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* It may take hashing into account
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* @param index Result of lindex function
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* @param lowPcBits PC bits masked with set size
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* @param way Way to be used
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*/
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int finallindex(int lindex, int lowPcBits, int way) const;
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/**
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* Get a branch prediction from the loop
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* predictor.
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* @param pc The unshifted branch PC.
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* @param bi Pointer to information on the
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* prediction.
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* @param speculative Use speculative number of iterations
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* @param instShiftAmt Shift the pc by as many bits (if hashing is not
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* used)
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* @result the result of the prediction, if it could be predicted
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*/
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bool getLoop(Addr pc, BranchInfo* bi, bool speculative,
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unsigned instShiftAmt) const;
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/**
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* Updates the loop predictor.
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* @param pc The unshifted branch PC.
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* @param taken The actual branch outcome.
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* @param bi Pointer to information on the
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* prediction recorded at prediction time.
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* @param tage_pred tage prediction of the branch
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*/
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void loopUpdate(Addr pc, bool Taken, BranchInfo* bi, bool tage_pred);
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/**
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* Speculatively updates the loop predictor
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* iteration count (only for useSpeculation).
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* @param taken The predicted branch outcome.
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* @param bi Pointer to information on the prediction
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* recorded at prediction time.
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*/
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void specLoopUpdate(bool taken, BranchInfo* bi);
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/**
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* Update LTAGE for conditional branches.
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* @param branch_pc The unshifted branch PC.
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* @param taken Actual branch outcome.
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* @param tage_pred Prediction from TAGE
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* @param bi Pointer to information on the prediction
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* recorded at prediction time.
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* @param instShiftAmt Number of bits to shift instructions
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*/
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void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken,
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bool tage_pred, BranchInfo* bi, unsigned instShiftAmt);
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/**
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* Get the loop prediction
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* @param tid The thread ID to select the global
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* histories to use.
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* @param branch_pc The unshifted branch PC.
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* @param cond_branch True if the branch is conditional.
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* @param bi Reference to wrapping pointer to allow storing
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* derived class prediction information in the base class.
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* @param prev_pred_taken Result of the TAGE prediction
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* @param instShiftAmt Shift the pc by as many bits
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* @param instShiftAmt Shift the pc by as many bits
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* @result the prediction, true if taken
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*/
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bool loopPredict(
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ThreadID tid, Addr branch_pc, bool cond_branch,
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BranchInfo* bi, bool prev_pred_taken, unsigned instShiftAmt);
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/**
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* Update the stats
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* @param taken Actual branch outcome
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* @param bi Pointer to information on the prediction
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* recorded at prediction time.
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*/
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void updateStats(bool taken, BranchInfo* bi);
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void squashLoop(BranchInfo * bi);
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void squash(ThreadID tid, BranchInfo *bi);
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virtual bool calcConf(int index) const;
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virtual bool optionalAgeInc() const;
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virtual BranchInfo *makeBranchInfo();
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/**
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* Gets the value of the loop use counter
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* @return the loop use counter value
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*/
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int8_t getLoopUseCounter() const
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{
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return loopUseCounter;
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}
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/**
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* Initialize the loop predictor
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*/
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void init() override;
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LoopPredictor(LoopPredictorParams *p);
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size_t getSizeInBits() const;
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};
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#endif//__CPU_PRED_LOOP_PREDICTOR_HH__
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