Change-Id: I4df2557c71e38cc4e3a485b0e590e85eb45de8b6 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33553 Maintainer: Jason Lowe-Power <power.jg@gmail.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
139 lines
4.9 KiB
C++
139 lines
4.9 KiB
C++
/*
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* Copyright (c) 2011,2013 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* Port object definitions.
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*/
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#include "mem/translating_port_proxy.hh"
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#include "base/chunk_generator.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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#include "sim/system.hh"
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TranslatingPortProxy::TranslatingPortProxy(
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ThreadContext *tc, Request::Flags _flags) :
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PortProxy(tc->getCpuPtr()->getSendFunctional(),
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tc->getSystemPtr()->cacheLineSize()), _tc(tc),
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pageBytes(tc->getSystemPtr()->getPageBytes()),
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flags(_flags)
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{}
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bool
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TranslatingPortProxy::tryTLBsOnce(RequestPtr req, BaseTLB::Mode mode) const
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{
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BaseTLB *dtb = _tc->getDTBPtr();
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BaseTLB *itb = _tc->getDTBPtr();
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return dtb->translateFunctional(req, _tc, mode) == NoFault ||
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itb->translateFunctional(req, _tc, BaseTLB::Read) == NoFault;
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}
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bool
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TranslatingPortProxy::tryTLBs(RequestPtr req, BaseTLB::Mode mode) const
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{
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// If at first this doesn't succeed, try to fixup and translate again. If
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// it still fails, report failure.
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return tryTLBsOnce(req, mode) ||
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(fixupAddr(req->getVaddr(), mode) && tryTLBsOnce(req, mode));
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}
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bool
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TranslatingPortProxy::tryReadBlob(Addr addr, void *p, int size) const
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{
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for (ChunkGenerator gen(addr, size, pageBytes); !gen.done();
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gen.next())
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{
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auto req = std::make_shared<Request>(
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gen.addr(), gen.size(), flags, Request::funcRequestorId, 0,
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_tc->contextId());
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if (!tryTLBs(req, BaseTLB::Read))
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return false;
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PortProxy::readBlobPhys(
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req->getPaddr(), req->getFlags(), p, gen.size());
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p = static_cast<uint8_t *>(p) + gen.size();
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}
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return true;
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}
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bool
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TranslatingPortProxy::tryWriteBlob(
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Addr addr, const void *p, int size) const
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{
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for (ChunkGenerator gen(addr, size, pageBytes); !gen.done();
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gen.next())
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{
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auto req = std::make_shared<Request>(
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gen.addr(), gen.size(), flags, Request::funcRequestorId, 0,
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_tc->contextId());
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if (!tryTLBs(req, BaseTLB::Write))
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return false;
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PortProxy::writeBlobPhys(
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req->getPaddr(), req->getFlags(), p, gen.size());
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p = static_cast<const uint8_t *>(p) + gen.size();
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}
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return true;
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}
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bool
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TranslatingPortProxy::tryMemsetBlob(Addr address, uint8_t v, int size) const
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{
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for (ChunkGenerator gen(address, size, pageBytes); !gen.done();
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gen.next())
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{
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auto req = std::make_shared<Request>(
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gen.addr(), gen.size(), flags, Request::funcRequestorId, 0,
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_tc->contextId());
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if (!tryTLBs(req, BaseTLB::Write))
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return false;
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PortProxy::memsetBlobPhys(
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req->getPaddr(), req->getFlags(), v, gen.size());
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}
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return true;
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}
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