Ron Dreslinski b22d390721 Yet another small bug in mem system related to flow control ...

src/mem/cache/cache_impl.hh:
    When upgrades change to readEx make sure to allocate the block
    Fix dprintf

--HG--
extra : convert_revision : 8700a7e47ad042c8708302620b907849c4bfdded

2006-11-12 06:36:33 -05:00

..

cache

Yet another small bug in mem system related to flow control

2006-11-12 06:36:33 -05:00

config

Backing in more changsets, getting closer to compile

2006-06-28 14:35:00 -04:00

bridge.cc

Use PacketPtr everywhere

2006-10-20 00:10:12 -07:00

bridge.hh

Use PacketPtr everywhere

2006-10-20 00:10:12 -07:00

bus.cc

Fix up bus draining and add draining to the caches.

2006-11-07 14:25:54 -05:00

bus.hh

Fix up bus draining and add draining to the caches.

2006-11-07 14:25:54 -05:00

dram.cc

Use PacketPtr everywhere

2006-10-20 00:10:12 -07:00

dram.hh

Use PacketPtr everywhere

2006-10-20 00:10:12 -07:00

mem_object.cc

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

mem_object.hh

Fix up doxygen.

2006-08-14 19:25:07 -04:00

packet_access.hh

refactor code for the packet, get rid of packet_impl.hh

2006-10-19 23:38:45 -07:00

packet.cc

Fix functional access errors related to delayed respnoses in cachePort

2006-11-12 06:35:39 -05:00

packet.hh

Fix functional access errors related to delayed respnoses in cachePort

2006-11-12 06:35:39 -05:00

page_table.cc

initialize end, clean up loop

2006-10-19 23:35:59 -07:00

page_table.hh

add code to serialize se structures. Lisa is working on the python side of things and will test

2006-10-17 19:38:36 -04:00

physical.cc

Get SPARC to the point that it starts running. Add ability to load the ROM bin files, cleanup lockstep printing a bit

2006-11-09 18:22:46 -05:00

physical.hh

Use PacketPtr everywhere

2006-10-20 00:10:12 -07:00

port_impl.hh

Put the ProcessInfo and StackTrace objects into the ISA namespaces.

2006-11-08 00:52:04 -05:00

port.cc

refactor code for the packet, get rid of packet_impl.hh

2006-10-19 23:38:45 -07:00

port.hh

Ports now have a pointer to the MemObject that owns it (can be NULL).

2006-10-31 13:59:30 -05:00

request.hh

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00

tport.cc

Big fix for functional access, where we forgot to copy the last byte on write intersections.

2006-11-10 22:41:21 -05:00

tport.hh

Merge ktlim@zizzer:/bk/newmem

2006-10-31 14:37:19 -05:00

translating_port.cc

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

translating_port.hh

Updated Authors from bk prs info

2006-05-31 19:26:56 -04:00

vport.cc

Fix up doxygen.

2006-08-14 19:25:07 -04:00

vport.hh

Fix up doxygen.

2006-08-14 19:25:07 -04:00