b0fd05dd3d
This change splits the default gem5 memory controller into two memory controllers: MemCtrl (base memory controller which can be used with only a single memory interface dram/nvm), and HeteroMemCtrl (heterogeneous memory controller which inherits from MemCtrl and requires a dram and an nvm memory interface). New arguments are added to many of the base class (MemCtrl) functions (for example memory inteface to use that function for) which helps in easier use of these in the inherited class (HeteroMemCtrl). Change-Id: Ifa4e9f9f1560c47063d1a8159a8c94add2e670bb Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/59731 Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Bobby Bruce <bbruce@ucdavis.edu> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
143 lines
4.9 KiB
C++
143 lines
4.9 KiB
C++
/*
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* Copyright (c) 2012-2020 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2013 Amin Farmahini-Farahani
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* HeteroMemCtrl declaration
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*/
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#ifndef __HETERO_MEM_CTRL_HH__
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#define __HETERO_MEM_CTRL_HH__
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#include "mem/mem_ctrl.hh"
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#include "params/HeteroMemCtrl.hh"
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namespace gem5
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{
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namespace memory
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{
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class HeteroMemCtrl : public MemCtrl
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{
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private:
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/**
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* Create pointer to interface of the actual nvm media when connected.
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*/
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NVMInterface* nvm;
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MemPacketQueue::iterator chooseNext(MemPacketQueue& queue,
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Tick extra_col_delay, MemInterface* mem_int) override;
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virtual std::pair<MemPacketQueue::iterator, Tick>
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chooseNextFRFCFS(MemPacketQueue& queue, Tick extra_col_delay,
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MemInterface* mem_intr) override;
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Tick doBurstAccess(MemPacket* mem_pkt, MemInterface* mem_int) override;
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Tick minReadToWriteDataGap() override;
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Tick minWriteToReadDataGap() override;
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AddrRangeList getAddrRanges() override;
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/**
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* Burst-align an address.
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*
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* @param addr The potentially unaligned address
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* @param mem_intr The DRAM memory interface this packet belongs to
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*
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* @return An address aligned to a memory burst
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*/
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virtual Addr burstAlign(Addr addr, MemInterface* mem_intr) const override;
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/**
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* Check if mem pkt's size is sane
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*
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* @param mem_pkt memory packet
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* @param mem_intr memory interface
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* @return a boolean indicating if the mem pkt size is less than
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* the burst size of the related mem interface
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*/
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virtual bool
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pktSizeCheck(MemPacket* mem_pkt, MemInterface* mem_intr) const override;
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virtual void processRespondEvent(MemInterface* mem_intr,
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MemPacketQueue& queue,
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EventFunctionWrapper& resp_event) override;
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/**
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* Checks if the memory interface is already busy
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*
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* @param mem_intr memory interface to check
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* @return a boolean indicating if memory is busy
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*/
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virtual bool memBusy(MemInterface* mem_intr) override;
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/**
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* Will access nvm memory interface and select non-deterministic
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* reads to issue
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*/
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virtual void nonDetermReads(MemInterface* mem_intr) override;
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/**
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* Will check if all writes are for nvm interface
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* and nvm's write resp queue is full.
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*
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* @param mem_intr memory interface to use
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* @return a boolean showing if nvm is blocked with writes
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*/
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virtual bool nvmWriteBlock(MemInterface* mem_intr) override;
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public:
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HeteroMemCtrl(const HeteroMemCtrlParams &p);
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bool allIntfDrained() const override;
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DrainState drain() override;
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void drainResume() override;
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protected:
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Tick recvAtomic(PacketPtr pkt) override;
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void recvFunctional(PacketPtr pkt) override;
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bool recvTimingReq(PacketPtr pkt) override;
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};
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} // namespace memory
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} // namespace gem5
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#endif //__HETERO_MEM_CTRL_HH__
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