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b046be6858c0a9ea3df48ff77481577226dcd8e8
gem5/src/sim
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Andreas Sandberg b046be6858 base, sim, dev: Remove SWIG 
Remove SWIG guards and SWIG-specific C++ code.

Change-Id: Icaad6720513b6f48153727ef3f70e0dba0df4bee
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2921
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Tony Gutierrez <anthony.gutierrez@amd.com>
2017-05-02 12:37:32 +00:00
..
power
python: Use PyBind11 instead of SWIG for Python wrappers
2017-05-02 12:37:32 +00:00
probe
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
arguments.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
arguments.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
async.cc
base: Fix race in PollQueue and remove SIGALRM workaround
2013-11-29 14:36:10 +01:00
async.hh
base: Fix race in PollQueue and remove SIGALRM workaround
2013-11-29 14:36:10 +01:00
aux_vector.cc
syscall_emul: [patch 8/22] refactor process class
2016-11-09 14:27:41 -06:00
aux_vector.hh
syscall_emul: [patch 8/22] refactor process class
2016-11-09 14:27:41 -06:00
backtrace_glibc.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
backtrace_none.cc
sim: Add support for generating back traces on errors
2015-12-04 00:12:58 +00:00
backtrace.hh
sim: Add support for generating back traces on errors
2015-12-04 00:12:58 +00:00
byteswap.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
clock_domain.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
clock_domain.hh
sim: Fix clock_domain unserialization
2016-04-01 16:22:44 +01:00
ClockDomain.py
power: Add basic DVFS support for gem5
2014-06-30 13:56:06 -04:00
clocked_object.cc
sim: Only print the power state transition warning once
2016-06-06 17:16:44 +01:00
clocked_object.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
ClockedObject.py
sim: Adding support for power models
2016-06-06 17:16:44 +01:00
core.cc
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
core.hh
sim: simulate with multiple threads and event queues
2013-11-25 11:21:00 -06:00
cxx_config_ini.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
cxx_config_ini.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
cxx_config.cc
config: Add the ability to read a config file using C++ and Python
2014-10-16 05:49:37 -04:00
cxx_config.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
cxx_manager.cc
misc: Fix order of object construction in the CxxConfigManager
2017-02-09 19:11:23 -05:00
cxx_manager.hh
sim: Decouple draining from the SimObject hierarchy
2015-07-07 09:51:05 +01:00
debug.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
debug.hh
sim: Add relative break scheduling
2015-10-09 14:27:09 -05:00
drain.cc
sim: Handle cases where Drainable::resume() creates objects
2017-04-03 16:38:26 +00:00
drain.hh
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
dvfs_handler.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
dvfs_handler.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
DVFSHandler.py
power: Add basic DVFS support for gem5
2014-06-30 13:56:06 -04:00
emul_driver.hh
syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead
2016-11-09 14:27:40 -06:00
eventq_impl.hh
sim: simulate with multiple threads and event queues
2013-11-25 11:21:00 -06:00
eventq.cc
style: remove trailing whitespace
2016-02-06 17:21:18 -08:00
eventq.hh
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
faults.cc
syscall_emul: [patch 13/22] add system call retry capability
2015-07-20 09:15:21 -05:00
faults.hh
syscall_emul: [patch 13/22] add system call retry capability
2015-07-20 09:15:21 -05:00
fd_array.cc
syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations
2017-02-27 14:10:15 -05:00
fd_array.hh
syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations
2017-02-27 14:10:15 -05:00
fd_entry.cc
syscall_emul: [patch 10/22] refactor fdentry and add fdarray class
2016-11-09 14:27:42 -06:00
fd_entry.hh
syscall_emul: [patch 10/22] refactor fdentry and add fdarray class
2016-11-09 14:27:42 -06:00
full_system.hh
clang: Fix recently introduced clang compilation errors
2012-03-19 06:35:04 -04:00
futex_map.hh
syscall-emul: Rewrite system call exit code
2017-03-09 22:42:45 +00:00
global_event.cc
sim: Fix resource leak in BaseGlobalEvent
2014-09-09 04:36:32 -04:00
global_event.hh
dev: Distributed Ethernet link for distributed gem5 simulations
2016-01-07 16:33:47 -06:00
init_signals.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
init_signals.hh
config: Add a --without-python option to build process
2014-10-16 05:49:32 -04:00
init.cc
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
init.hh
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
initparam_keys.hh
dev: Distributed Ethernet link for distributed gem5 simulations
2016-01-07 16:33:47 -06:00
insttracer.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
InstTracer.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
linear_solver.cc
sim: Adding thermal model support
2015-05-12 10:26:47 +01:00
linear_solver.hh
sim: Adding thermal model support
2015-05-12 10:26:47 +01:00
main.cc
config: Add a --without-python option to build process
2014-10-16 05:49:32 -04:00
mathexpr.cc
sim: Make clang happy
2016-06-07 14:27:49 +01:00
mathexpr.hh
sim: Added library include to fix build errors on clang-703.0.31
2016-06-20 15:34:41 +01:00
mem_state.hh
syscall-emul: Move memState into its own file
2017-03-09 19:19:38 +00:00
microcode_rom.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
microcode_rom.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
process_impl.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
process.cc
syscall-emul: Hotfix for FreeBSD/Mac builds
2017-03-17 18:40:33 +00:00
process.hh
syscall-emul: change NULL to nullptr in Process files
2017-03-17 18:39:58 +00:00
Process.py
python: Use PyBind11 instead of SWIG for Python wrappers
2017-05-02 12:37:32 +00:00
pseudo_inst.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pseudo_inst.hh
dev: Add m5 op to toggle synchronization for dist-gem5.
2016-10-26 22:48:40 -04:00
py_interact.cc
style: Force Python.h to be included before main header
2017-02-07 15:28:33 +00:00
py_interact.hh
config: Add a --without-python option to build process
2014-10-16 05:49:32 -04:00
root.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
root.hh
misc: Add explicit overrides and fix other clang >= 3.5 issues
2015-10-12 04:08:01 -04:00
Root.py
sim: Remove redundant buildEnv import
2016-12-19 16:25:37 +00:00
SConscript
syscall-emul: Adds SE mode signal feature
2017-03-09 22:42:45 +00:00
se_signal.cc
syscall-emul: Adds SE mode signal feature
2017-03-09 22:42:45 +00:00
se_signal.hh
syscall-emul: Adds SE mode signal feature
2017-03-09 22:42:45 +00:00
serialize.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
serialize.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
sim_events.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
sim_events.hh
sim: Remove declaration of unused CountedDrainEvent
2017-01-03 17:31:39 +00:00
sim_exit.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
sim_object.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
sim_object.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
simulate.cc
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
simulate.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
stat_control.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
stat_control.hh
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
stat_register.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
stat_register.hh
base, sim, dev: Remove SWIG
2017-05-02 12:37:32 +00:00
stats.hh
stats: make simTicks and simFreq accessible from stats.hh
2010-04-18 13:23:25 -07:00
sub_system.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
sub_system.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
SubSystem.py
sim: Adding thermal model support
2015-05-12 10:26:47 +01:00
syscall_debug_macros.hh
syscall_emul: [patch 2/22] move SyscallDesc into its own .hh and .cc
2016-11-09 14:27:40 -06:00
syscall_desc.cc
syscall_emul: [patch 13/22] add system call retry capability
2015-07-20 09:15:21 -05:00
syscall_desc.hh
syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations
2017-02-27 14:10:15 -05:00
syscall_emul_buf.hh
syscall_emul: devirtualize BaseBufferArg methods
2014-10-22 15:53:34 -07:00
syscall_emul.cc
style: change NULL to nullptr in syscall files
2017-03-09 22:42:45 +00:00
syscall_emul.hh
style: change NULL to nullptr in syscall files
2017-03-09 22:42:45 +00:00
syscall_return.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
system.cc
sim, kvm: make KvmVM a System parameter
2017-02-14 15:09:18 -06:00
system.hh
syscall-emul: Rewrite system call exit code
2017-03-09 22:42:45 +00:00
System.py
python: Use PyBind11 instead of SWIG for Python wrappers
2017-05-02 12:37:32 +00:00
ticked_object.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
ticked_object.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
TickedObject.py
cpu: `Minor' in-order CPU model
2014-07-23 16:09:04 -05:00
voltage_domain.cc
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00
voltage_domain.hh
misc: Add explicit overrides and fix other clang >= 3.5 issues
2015-10-12 04:08:01 -04:00
VoltageDomain.py
power: Add basic DVFS support for gem5
2014-06-30 13:56:06 -04:00
vptr.hh
style: [patch 3/22] reduce include dependencies in some headers
2016-11-09 14:27:40 -06:00