This patch eliminates the type Address defined by the ruby memory system. This memory system would now use the type Addr that is in use by the rest of the system.
117 lines
4.7 KiB
Plaintext
117 lines
4.7 KiB
Plaintext
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/*
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* Copyright (c) 1999-2005 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// CoherenceRequestType
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enumeration(CoherenceRequestType, desc="...") {
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GETX, desc="Get eXclusive";
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UPGRADE, desc="UPGRADE to exclusive";
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GETS, desc="Get Shared";
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GET_INSTR, desc="Get Instruction";
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INV, desc="INValidate";
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PUTX, desc="Replacement message";
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WB_ACK, desc="Writeback ack";
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DMA_READ, desc="DMA Read";
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DMA_WRITE, desc="DMA Write";
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}
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// CoherenceResponseType
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enumeration(CoherenceResponseType, desc="...") {
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MEMORY_ACK, desc="Ack from memory controller";
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DATA, desc="Data block for L1 cache in S state";
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DATA_EXCLUSIVE, desc="Data block for L1 cache in M/E state";
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MEMORY_DATA, desc="Data block from / to main memory";
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ACK, desc="Generic invalidate ack";
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WB_ACK, desc="writeback ack";
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UNBLOCK, desc="unblock";
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EXCLUSIVE_UNBLOCK, desc="exclusive unblock";
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INV, desc="Invalidate from directory";
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}
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// RequestMsg
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structure(RequestMsg, desc="...", interface="Message") {
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Addr addr, desc="Physical address for this request";
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CoherenceRequestType Type, desc="Type of request (GetS, GetX, PutX, etc)";
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RubyAccessMode AccessMode, desc="user/supervisor access type";
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MachineID Requestor , desc="What component request";
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NetDest Destination, desc="What components receive the request, includes MachineType and num";
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MessageSizeType MessageSize, desc="size category of the message";
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DataBlock DataBlk, desc="Data for the cache line (if PUTX)";
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int Len;
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bool Dirty, default="false", desc="Dirty bit";
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PrefetchBit Prefetch, desc="Is this a prefetch request";
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bool functionalRead(Packet *pkt) {
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// Only PUTX messages contains the data block
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if (Type == CoherenceRequestType:PUTX) {
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return testAndRead(addr, DataBlk, pkt);
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}
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return false;
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}
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bool functionalWrite(Packet *pkt) {
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// No check on message type required since the protocol should
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// read data from those messages that contain the block
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return testAndWrite(addr, DataBlk, pkt);
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}
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}
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// ResponseMsg
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structure(ResponseMsg, desc="...", interface="Message") {
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Addr addr, desc="Physical address for this request";
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CoherenceResponseType Type, desc="Type of response (Ack, Data, etc)";
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MachineID Sender, desc="What component sent the data";
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NetDest Destination, desc="Node to whom the data is sent";
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DataBlock DataBlk, desc="Data for the cache line";
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bool Dirty, default="false", desc="Dirty bit";
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int AckCount, default="0", desc="number of acks in this message";
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MessageSizeType MessageSize, desc="size category of the message";
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bool functionalRead(Packet *pkt) {
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// Valid data block is only present in message with following types
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if (Type == CoherenceResponseType:DATA ||
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Type == CoherenceResponseType:DATA_EXCLUSIVE ||
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Type == CoherenceResponseType:MEMORY_DATA) {
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return testAndRead(addr, DataBlk, pkt);
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}
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return false;
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}
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bool functionalWrite(Packet *pkt) {
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// No check on message type required since the protocol should
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// read data from those messages that contain the block
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return testAndWrite(addr, DataBlk, pkt);
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}
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}
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