Gabe Black ae390c629f arch: Make a base class for Interrupts. ...

That abstracts the ISA further from the CPU, getting us a small step
closer to being able to build in more than one ISA at a time.

Change-Id: Ibf7e26a3df411ffe994ac1e11d2a53b656863223
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20831
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

2019-10-19 01:45:48 +00:00

..

arch

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

base

tests: Added GTests for base/bitfield.hh

2019-10-18 22:06:28 +00:00

cpu

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

dev

arch: Make a base class for Interrupts.

2019-10-19 01:45:48 +00:00

doc

mem: Minimize the use of MemObject.

2019-04-28 01:19:40 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

gpu-compute: Fix overriden errors

2019-09-20 22:42:31 +00:00

kern

kern: Replace an explicitly instantiated port proxy with one from the tc.

2019-05-30 14:20:03 +00:00

learning_gem5

mem-ruby: Allow Ruby to use all replacement policies in Classic

2019-10-11 03:29:29 +00:00

mem

mem: Delete the MessageReq and MessageResp memory commands.

2019-10-18 01:43:55 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

misc: Added line wrapping functionality for Sim-Object desc

2019-09-30 19:50:26 +00:00

sim

arch,base,sim: Move Process loader hooks into the Process class.

2019-10-16 01:36:33 +00:00

systemc

systemc: Make TLM port wrappers for tlm_base_(target|initiator)_socket.

2019-09-17 19:07:59 +00:00

unittest

tests: Migrated refcnt.cc test from src/unitttest to a gtest

2019-10-09 19:14:40 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Move the marshal binary to the build directory

2019-05-21 15:46:50 +00:00