Apply the gem5 namespace to the codebase. Some anonymous namespaces could theoretically be removed, but since this change's main goal was to keep conflicts at a minimum, it was decided not to modify much the general shape of the files. A few missing comments of the form "// namespace X" that occurred before the newly added "} // namespace gem5" have been added for consistency. std out should not be included in the gem5 namespace, so they weren't. ProtoMessage has not been included in the gem5 namespace, since I'm not familiar with how proto works. Regarding the SystemC files, although they belong to gem5, they actually perform integration between gem5 and SystemC; therefore, it deserved its own separate namespace. Files that are automatically generated have been included in the gem5 namespace. The .isa files currently are limited to a single namespace. This limitation should be later removed to make it easier to accomodate a better API. Regarding the files in util, gem5:: was prepended where suitable. Notice that this patch was tested as much as possible given that most of these were already not previously compiling. Change-Id: Ia53d404ec79c46edaa98f654e23bc3b0e179fe2d Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46323 Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Matthew Poremba <matthew.poremba@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
695 lines
18 KiB
C++
695 lines
18 KiB
C++
/*
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* Copyright (c) 2010-2013, 2015, 2017 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "dev/arm/hdlcd.hh"
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#include "base/compiler.hh"
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#include "base/output.hh"
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#include "base/trace.hh"
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#include "base/vnc/vncinput.hh"
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#include "debug/Checkpoint.hh"
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#include "debug/HDLcd.hh"
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#include "dev/arm/amba_device.hh"
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#include "dev/arm/base_gic.hh"
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#include "enums/ImageFormat.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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#include "params/HDLcd.hh"
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#include "sim/system.hh"
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using std::vector;
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namespace gem5
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{
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// initialize hdlcd registers
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HDLcd::HDLcd(const HDLcdParams &p)
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: AmbaDmaDevice(p, 0xFFFF),
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// Parameters
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vnc(p.vnc),
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workaroundSwapRB(p.workaround_swap_rb),
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workaroundDmaLineCount(p.workaround_dma_line_count),
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addrRanges{RangeSize(pioAddr, pioSize)},
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enableCapture(p.enable_capture),
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pixelBufferSize(p.pixel_buffer_size),
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virtRefreshRate(p.virt_refresh_rate),
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virtRefreshEvent([this]{ virtRefresh(); }, name()),
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// Other
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imgFormat(p.frame_format),
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pixelPump(*this, *p.pxl_clk, p.pixel_chunk),
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stats(this)
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{
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if (vnc)
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vnc->setFrameBuffer(&pixelPump.fb);
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imgWriter = createImgWriter(imgFormat, &pixelPump.fb);
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}
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HDLcd::HDLcdStats::HDLcdStats(statistics::Group *parent)
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: statistics::Group(parent, "HDLcd"),
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ADD_STAT(underruns, statistics::units::Count::get(),
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"Number of buffer underruns")
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{
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using namespace statistics;
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underruns.flags(nozero);
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}
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void
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HDLcd::serialize(CheckpointOut &cp) const
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{
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DPRINTF(Checkpoint, "Serializing ARM HDLCD\n");
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SERIALIZE_SCALAR(int_rawstat);
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SERIALIZE_SCALAR(int_mask);
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SERIALIZE_SCALAR(fb_base);
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SERIALIZE_SCALAR(fb_line_length);
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SERIALIZE_SCALAR(fb_line_count);
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SERIALIZE_SCALAR(fb_line_pitch);
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SERIALIZE_SCALAR(bus_options);
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SERIALIZE_SCALAR(v_sync);
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SERIALIZE_SCALAR(v_back_porch);
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SERIALIZE_SCALAR(v_data);
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SERIALIZE_SCALAR(v_front_porch);
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SERIALIZE_SCALAR(h_sync);
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SERIALIZE_SCALAR(h_back_porch);
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SERIALIZE_SCALAR(h_data);
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SERIALIZE_SCALAR(h_front_porch);
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SERIALIZE_SCALAR(polarities);
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SERIALIZE_SCALAR(command);
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SERIALIZE_SCALAR(pixel_format);
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SERIALIZE_SCALAR(red_select);
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SERIALIZE_SCALAR(green_select);
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SERIALIZE_SCALAR(blue_select);
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SERIALIZE_OBJ(pixelPump);
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if (enabled())
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dmaEngine->serializeSection(cp, "dmaEngine");
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}
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void
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HDLcd::unserialize(CheckpointIn &cp)
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{
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DPRINTF(Checkpoint, "Unserializing ARM HDLCD\n");
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UNSERIALIZE_SCALAR(int_rawstat);
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UNSERIALIZE_SCALAR(int_mask);
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UNSERIALIZE_SCALAR(fb_base);
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UNSERIALIZE_SCALAR(fb_line_length);
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UNSERIALIZE_SCALAR(fb_line_count);
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UNSERIALIZE_SCALAR(fb_line_pitch);
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UNSERIALIZE_SCALAR(bus_options);
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UNSERIALIZE_SCALAR(v_sync);
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UNSERIALIZE_SCALAR(v_back_porch);
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UNSERIALIZE_SCALAR(v_data);
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UNSERIALIZE_SCALAR(v_front_porch);
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UNSERIALIZE_SCALAR(h_sync);
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UNSERIALIZE_SCALAR(h_back_porch);
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UNSERIALIZE_SCALAR(h_data);
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UNSERIALIZE_SCALAR(h_front_porch);
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UNSERIALIZE_SCALAR(polarities);
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UNSERIALIZE_SCALAR(command);
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UNSERIALIZE_SCALAR(pixel_format);
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UNSERIALIZE_SCALAR(red_select);
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UNSERIALIZE_SCALAR(green_select);
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UNSERIALIZE_SCALAR(blue_select);
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{
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// Try to unserialize the pixel pump. It might not exist if
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// we're unserializing an old checkpoint.
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ScopedCheckpointSection sec(cp, "pixelPump");
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if (cp.sectionExists(Serializable::currentSection()))
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pixelPump.unserialize(cp);
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}
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if (enabled()) {
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// Create the DMA engine and read its state from the
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// checkpoint. We don't need to worry about the pixel pump as
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// it is a proper SimObject.
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createDmaEngine();
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dmaEngine->unserializeSection(cp, "dmaEngine");
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conv = pixelConverter();
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}
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}
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void
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HDLcd::drainResume()
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{
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AmbaDmaDevice::drainResume();
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if (enabled()) {
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if (sys->bypassCaches()) {
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// We restart the HDLCD if we are in KVM mode. This
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// ensures that we always use the fast refresh logic if we
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// resume in KVM mode.
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cmdDisable();
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cmdEnable();
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} else if (!pixelPump.active()) {
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// We restored from an old checkpoint without a pixel
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// pump, start an new refresh. This typically happens when
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// restoring from old checkpoints.
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cmdEnable();
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}
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}
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// We restored from a checkpoint and need to update the VNC server
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if (pixelPump.active() && vnc)
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vnc->setDirty();
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}
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void
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HDLcd::virtRefresh()
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{
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pixelPump.renderFrame();
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schedule(virtRefreshEvent, (curTick() + virtRefreshRate));
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}
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// read registers and frame buffer
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Tick
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HDLcd::read(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= pioAddr &&
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pkt->getAddr() < pioAddr + pioSize);
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const Addr daddr = pkt->getAddr() - pioAddr;
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panic_if(pkt->getSize() != 4,
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"Unhandled read size (address: 0x.4x, size: %u)",
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daddr, pkt->getSize());
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const uint32_t data = readReg(daddr);
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DPRINTF(HDLcd, "read register 0x%04x: 0x%x\n", daddr, data);
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pkt->setLE<uint32_t>(data);
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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// write registers and frame buffer
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Tick
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HDLcd::write(PacketPtr pkt)
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{
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assert(pkt->getAddr() >= pioAddr &&
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pkt->getAddr() < pioAddr + pioSize);
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const Addr daddr = pkt->getAddr() - pioAddr;
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panic_if(pkt->getSize() != 4,
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"Unhandled read size (address: 0x.4x, size: %u)",
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daddr, pkt->getSize());
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const uint32_t data = pkt->getLE<uint32_t>();
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DPRINTF(HDLcd, "write register 0x%04x: 0x%x\n", daddr, data);
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writeReg(daddr, data);
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pkt->makeAtomicResponse();
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return pioDelay;
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}
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uint32_t
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HDLcd::readReg(Addr offset)
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{
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switch (offset) {
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case Version: return version;
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case Int_RawStat: return int_rawstat;
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case Int_Clear:
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panic("HDLCD INT_CLEAR register is Write-Only\n");
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case Int_Mask: return int_mask;
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case Int_Status: return intStatus();
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case Fb_Base: return fb_base;
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case Fb_Line_Length: return fb_line_length;
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case Fb_Line_Count: return fb_line_count;
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case Fb_Line_Pitch: return fb_line_pitch;
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case Bus_Options: return bus_options;
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case V_Sync: return v_sync;
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case V_Back_Porch: return v_back_porch;
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case V_Data: return v_data;
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case V_Front_Porch: return v_front_porch;
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case H_Sync: return h_sync;
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case H_Back_Porch: return h_back_porch;
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case H_Data: return h_data;
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case H_Front_Porch: return h_front_porch;
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case Polarities: return polarities;
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case Command: return command;
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case Pixel_Format: return pixel_format;
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case Red_Select: return red_select;
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case Green_Select: return green_select;
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case Blue_Select: return blue_select;
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default:
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panic("Tried to read HDLCD register that doesn't exist\n", offset);
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}
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}
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void
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HDLcd::writeReg(Addr offset, uint32_t value)
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{
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switch (offset) {
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case Version:
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panic("HDLCD VERSION register is read-Only\n");
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case Int_RawStat:
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intRaise(value);
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return;
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case Int_Clear:
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intClear(value);
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return;
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case Int_Mask:
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intMask(value);
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return;
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case Int_Status:
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panic("HDLCD INT_STATUS register is read-Only\n");
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break;
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case Fb_Base:
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fb_base = value;
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return;
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case Fb_Line_Length:
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fb_line_length = value;
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return;
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case Fb_Line_Count:
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fb_line_count = value;
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return;
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case Fb_Line_Pitch:
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fb_line_pitch = value;
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return;
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case Bus_Options: {
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const BusOptsReg old_bus_options(bus_options);
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bus_options = value;
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if (bus_options.max_outstanding != old_bus_options.max_outstanding) {
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DPRINTF(HDLcd,
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"Changing HDLcd outstanding DMA transactions: %d -> %d\n",
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old_bus_options.max_outstanding,
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bus_options.max_outstanding);
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}
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if (bus_options.burst_len != old_bus_options.burst_len) {
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DPRINTF(HDLcd,
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"Changing HDLcd DMA burst flags: 0x%x -> 0x%x\n",
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old_bus_options.burst_len, bus_options.burst_len);
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}
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} return;
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case V_Sync:
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v_sync = value;
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return;
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case V_Back_Porch:
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v_back_porch = value;
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return;
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case V_Data:
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v_data = value;
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return;
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case V_Front_Porch:
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v_front_porch = value;
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return;
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case H_Sync:
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h_sync = value;
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return;
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case H_Back_Porch:
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h_back_porch = value;
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return;
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case H_Data:
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h_data = value;
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return;
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case H_Front_Porch:
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h_front_porch = value;
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return;
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case Polarities:
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polarities = value;
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return;
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case Command: {
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const CommandReg new_command(value);
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if (new_command.enable != command.enable) {
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DPRINTF(HDLcd, "HDLCD switched %s\n",
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new_command.enable ? "on" : "off");
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if (new_command.enable) {
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cmdEnable();
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} else {
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cmdDisable();
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}
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}
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command = new_command;
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} return;
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case Pixel_Format:
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pixel_format = value;
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return;
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case Red_Select:
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red_select = value;
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return;
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case Green_Select:
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green_select = value;
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return;
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case Blue_Select:
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blue_select = value;
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return;
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default:
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panic("Tried to write HDLCD register that doesn't exist\n", offset);
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return;
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}
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}
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PixelConverter
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HDLcd::pixelConverter() const
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{
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ByteOrder byte_order =
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pixel_format.big_endian ? ByteOrder::big : ByteOrder::little;
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/* Some Linux kernels have a broken driver that swaps the red and
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* blue color select registers. */
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if (!workaroundSwapRB) {
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return PixelConverter(
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pixel_format.bytes_per_pixel + 1,
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red_select.offset, green_select.offset, blue_select.offset,
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red_select.size, green_select.size, blue_select.size,
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byte_order);
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} else {
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return PixelConverter(
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pixel_format.bytes_per_pixel + 1,
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blue_select.offset, green_select.offset, red_select.offset,
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blue_select.size, green_select.size, red_select.size,
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byte_order);
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}
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}
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DisplayTimings
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HDLcd::displayTimings() const
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{
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return DisplayTimings(
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h_data.val + 1, v_data.val + 1,
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h_back_porch.val + 1, h_sync.val + 1, h_front_porch.val + 1,
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v_back_porch.val + 1, v_sync.val + 1, v_front_porch.val + 1);
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}
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void
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HDLcd::createDmaEngine()
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{
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if (bus_options.max_outstanding == 0) {
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warn("Maximum number of outstanding DMA transfers set to 0.");
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return;
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}
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const uint32_t dma_burst_flags = bus_options.burst_len;
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const uint32_t dma_burst_len = dma_burst_flags ?
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(1UL << (findMsbSet(dma_burst_flags) - 1)) : MAX_BURST_LEN;
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// Some drivers seem to set the DMA line count incorrectly. This
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// could either be a driver bug or a specification bug. Unlike for
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// timings, the specification does not require 1 to be added to
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// the DMA engine's line count.
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const uint32_t dma_lines =
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fb_line_count + (workaroundDmaLineCount ? 1 : 0);
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dmaEngine.reset(new DmaEngine(
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*this, pixelBufferSize,
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AXI_PORT_WIDTH * dma_burst_len,
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bus_options.max_outstanding,
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fb_line_length, fb_line_pitch, dma_lines));
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}
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void
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HDLcd::cmdEnable()
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{
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createDmaEngine();
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conv = pixelConverter();
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// Update timing parameter before rendering frames
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pixelPump.updateTimings(displayTimings());
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if (sys->bypassCaches()) {
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schedule(virtRefreshEvent, clockEdge());
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} else {
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pixelPump.start();
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}
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}
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void
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HDLcd::cmdDisable()
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{
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pixelPump.stop();
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// Disable the virtual refresh event
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if (virtRefreshEvent.scheduled()) {
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assert(sys->bypassCaches());
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deschedule(virtRefreshEvent);
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}
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dmaEngine->abortFrame();
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}
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bool
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HDLcd::pxlNext(Pixel &p)
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{
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uint8_t pixel_data[MAX_PIXEL_SIZE];
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assert(conv.length <= sizeof(pixel_data));
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if (dmaEngine->tryGet(pixel_data, conv.length)) {
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p = conv.toPixel(pixel_data);
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return true;
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} else {
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return false;
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}
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}
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size_t
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HDLcd::lineNext(std::vector<Pixel>::iterator pixel_it, size_t line_length)
|
|
{
|
|
const size_t byte_count = line_length * conv.length;
|
|
|
|
lineBuffer.resize(byte_count);
|
|
dmaRead(bypassLineAddress, byte_count, nullptr, lineBuffer.data());
|
|
|
|
bypassLineAddress += fb_line_pitch;
|
|
|
|
uint8_t *bufPtr = lineBuffer.data();
|
|
for (size_t i = 0; i < line_length; i++) {
|
|
*pixel_it++ = conv.toPixel(bufPtr);
|
|
bufPtr += conv.length;
|
|
}
|
|
|
|
return line_length;
|
|
}
|
|
|
|
void
|
|
HDLcd::pxlVSyncBegin()
|
|
{
|
|
DPRINTF(HDLcd, "Raising VSYNC interrupt.\n");
|
|
intRaise(INT_VSYNC);
|
|
}
|
|
|
|
void
|
|
HDLcd::pxlVSyncEnd()
|
|
{
|
|
DPRINTF(HDLcd, "End of VSYNC, starting DMA engine\n");
|
|
if (sys->bypassCaches()) {
|
|
bypassLineAddress = fb_base;
|
|
} else {
|
|
dmaEngine->startFrame(fb_base);
|
|
}
|
|
}
|
|
|
|
void
|
|
HDLcd::pxlUnderrun()
|
|
{
|
|
DPRINTF(HDLcd, "Buffer underrun, stopping DMA fill.\n");
|
|
++stats.underruns;
|
|
intRaise(INT_UNDERRUN);
|
|
dmaEngine->abortFrame();
|
|
}
|
|
|
|
void
|
|
HDLcd::pxlFrameDone()
|
|
{
|
|
DPRINTF(HDLcd, "Reached end of last visible line.\n");
|
|
|
|
if (dmaEngine->size()) {
|
|
warn("HDLCD %u bytes still in FIFO after frame: Ensure that DMA "
|
|
"and PixelPump configuration is consistent\n",
|
|
dmaEngine->size());
|
|
dmaEngine->dumpSettings();
|
|
pixelPump.dumpSettings();
|
|
}
|
|
|
|
if (vnc)
|
|
vnc->setDirty();
|
|
|
|
if (enableCapture) {
|
|
if (!pic) {
|
|
pic = simout.create(
|
|
csprintf("%s.framebuffer.%s",
|
|
sys->name(), imgWriter->getImgExtension()),
|
|
true);
|
|
}
|
|
|
|
assert(pic);
|
|
pic->stream()->seekp(0);
|
|
imgWriter->write(*pic->stream());
|
|
}
|
|
}
|
|
|
|
void
|
|
HDLcd::setInterrupts(uint32_t ints, uint32_t mask)
|
|
{
|
|
const bool old_ints = intStatus();
|
|
|
|
int_mask = mask;
|
|
int_rawstat = ints;
|
|
|
|
if (!old_ints && intStatus()) {
|
|
interrupt->raise();
|
|
} else if (old_ints && !intStatus()) {
|
|
interrupt->clear();
|
|
}
|
|
}
|
|
|
|
HDLcd::DmaEngine::DmaEngine(HDLcd &_parent, size_t size,
|
|
unsigned request_size, unsigned max_pending,
|
|
size_t line_size, ssize_t line_pitch, unsigned num_lines)
|
|
: DmaReadFifo(
|
|
_parent.dmaPort, size, request_size, max_pending,
|
|
Request::UNCACHEABLE),
|
|
parent(_parent),
|
|
lineSize(line_size), linePitch(line_pitch), numLines(num_lines),
|
|
nextLineAddr(0)
|
|
{
|
|
}
|
|
|
|
void
|
|
HDLcd::DmaEngine::serialize(CheckpointOut &cp) const
|
|
{
|
|
DmaReadFifo::serialize(cp);
|
|
|
|
SERIALIZE_SCALAR(nextLineAddr);
|
|
SERIALIZE_SCALAR(frameEnd);
|
|
}
|
|
|
|
void
|
|
HDLcd::DmaEngine::unserialize(CheckpointIn &cp)
|
|
{
|
|
DmaReadFifo::unserialize(cp);
|
|
|
|
UNSERIALIZE_SCALAR(nextLineAddr);
|
|
UNSERIALIZE_SCALAR(frameEnd);
|
|
}
|
|
|
|
void
|
|
HDLcd::DmaEngine::startFrame(Addr fb_base)
|
|
{
|
|
nextLineAddr = fb_base;
|
|
frameEnd = fb_base + numLines * linePitch;
|
|
|
|
startFill(nextLineAddr, lineSize);
|
|
}
|
|
|
|
void
|
|
HDLcd::DmaEngine::abortFrame()
|
|
{
|
|
nextLineAddr = frameEnd;
|
|
stopFill();
|
|
flush();
|
|
}
|
|
|
|
|
|
void
|
|
HDLcd::DmaEngine::dumpSettings()
|
|
{
|
|
inform("DMA line size: %u bytes", lineSize);
|
|
inform("DMA line pitch: %i bytes", linePitch);
|
|
inform("DMA num lines: %u", numLines);
|
|
}
|
|
|
|
void
|
|
HDLcd::DmaEngine::onEndOfBlock()
|
|
{
|
|
if (nextLineAddr == frameEnd)
|
|
// We're done with this frame. Ignore calls to this method
|
|
// until the next frame has been started.
|
|
return;
|
|
|
|
nextLineAddr += linePitch;
|
|
if (nextLineAddr != frameEnd)
|
|
startFill(nextLineAddr, lineSize);
|
|
}
|
|
|
|
void
|
|
HDLcd::DmaEngine::onIdle()
|
|
{
|
|
parent.intRaise(INT_DMA_END);
|
|
}
|
|
|
|
void
|
|
HDLcd::PixelPump::dumpSettings()
|
|
{
|
|
const DisplayTimings &t = timings();
|
|
|
|
inform("PixelPump width: %u", t.width);
|
|
inform("PixelPump height: %u", t.height);
|
|
|
|
inform("PixelPump horizontal back porch: %u", t.hBackPorch);
|
|
inform("PixelPump horizontal fron porch: %u", t.hFrontPorch);
|
|
inform("PixelPump horizontal fron porch: %u", t.hSync);
|
|
|
|
inform("PixelPump vertical back porch: %u", t.vBackPorch);
|
|
inform("PixelPump vertical fron porch: %u", t.vFrontPorch);
|
|
inform("PixelPump vertical fron porch: %u", t.vSync);
|
|
}
|
|
|
|
} // namespace gem5
|