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aa031e1c116bc8bf22c844b4a9f3d2b3c69f995a
gem5/src/arch
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Gabe Black aa031e1c11 Alpha: Move reg_redir into its own files, and move some constants into regfile.hh.
2009-07-08 23:02:21 -07:00
..
alpha
Alpha: Move reg_redir into its own files, and move some constants into regfile.hh.
2009-07-08 23:02:21 -07:00
arm
Registers: Eliminate the ISA defined RegFile class.
2009-07-08 23:02:21 -07:00
mips
Registers: Eliminate the ISA defined RegFile class.
2009-07-08 23:02:21 -07:00
sparc
Registers: Eliminate the ISA defined RegFile class.
2009-07-08 23:02:21 -07:00
x86
Registers: Eliminate the ISA defined RegFile class.
2009-07-08 23:02:21 -07:00
isa_parser.py
Registers: Get rid of the float register width parameter.
2009-07-08 23:02:20 -07:00
isa_specific.hh
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
2008-09-10 14:26:15 -04:00
micro_asm_test.py
Add a second section to make sure the ROM is extended properly.
2007-05-31 22:21:21 +00:00
micro_asm.py
Microcode: Fix a silent typo error in the microcode assembler.
2008-10-09 00:07:38 -07:00
SConscript
Registers: Add an ISA object which replaces the MiscRegFile.
2009-07-08 23:02:20 -07:00
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