Gabe Black a91af24e60 misc: Clean up ISA switching header includes. ...

Remove includes that aren't needed, including ones for
config/the_isa.hh.

Also stop using switching includes when the ISA is known.

Change-Id: I2af6c88dcaf511b086ec808b0ba3196179982af2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40336
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>

2021-05-28 23:41:03 +00:00

..

probes

misc: Fix coding style for struct's opening braces

2021-03-19 20:57:24 +00:00

atomic.cc

arch,cpu: Make the decoder width a property of the decoder.

2021-05-26 00:31:54 +00:00

atomic.hh

cpu: Make the NonCachingSimpleCPU use a back door for fetch.

2020-11-10 13:43:19 +00:00

AtomicSimpleCPU.py

cpu: Delete authors lists from the cpu directory.

2020-02-17 21:51:23 +00:00

base.cc

cpu,fastmodel: Get rid of unused (read|set)FuncExeInst.

2021-05-28 18:51:55 +00:00

base.hh

misc: Clean up ISA switching header includes.

2021-05-28 23:41:03 +00:00

BaseSimpleCPU.py

arch, mem, cpu, systemc: Remove Python 2.7 glue code

2021-01-27 10:18:43 +00:00

exec_context.hh

base-stats: Rename Units namespace as units

2021-05-26 22:30:33 +00:00

noncaching.cc

arch,cpu: Make the decoder width a property of the decoder.

2021-05-26 00:31:54 +00:00

noncaching.hh

cpu: Make the NonCachingSimpleCPU use a back door for fetch.

2020-11-10 13:43:19 +00:00

NonCachingSimpleCPU.py

misc: Standardize the way create() constructs SimObjects.

2020-10-14 12:06:44 +00:00

SConscript

cpu: Delete authors lists from the cpu directory.

2020-02-17 21:51:23 +00:00

SConsopts

cpu: Delete authors lists from the cpu directory.

2020-02-17 21:51:23 +00:00

timing.cc

arch,cpu: Make the decoder width a property of the decoder.

2021-05-26 00:31:54 +00:00

timing.hh

misc: Fix coding style for struct's opening braces

2021-03-19 20:57:24 +00:00

TimingSimpleCPU.py

cpu: Delete authors lists from the cpu directory.

2020-02-17 21:51:23 +00:00