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a632ee72adc7056786752973ecfa44ae01fca137
gem5/src/cpu/pred
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Andrea Mondelli e13d6dc9c0 misc: Removed inconsistency in O3* debug msgs 
Added consistency in the DEBUG message form, to allow a better parsing.
Fixed sn/tid type parameter.
Removed some annoying newlines

Change-Id: I4761c49fc12b874a7d8b46779475b606865cad4b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17248
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
2019-04-03 16:50:22 +00:00
..
2bit_local.cc
cpu: Made TAGE a SimObject that can be used by other predictors
2019-02-05 10:11:43 +00:00
2bit_local.hh
cpu: Made TAGE a SimObject that can be used by other predictors
2019-02-05 10:11:43 +00:00
bi_mode.cc
cpu: Proposal for changing the indirect branch predictor interface
2019-02-08 22:31:27 +00:00
bi_mode.hh
cpu: Proposal for changing the indirect branch predictor interface
2019-02-08 22:31:27 +00:00
bpred_unit.cc
misc: Removed inconsistency in O3* debug msgs
2019-04-03 16:50:22 +00:00
bpred_unit.hh
cpu: Proposal for changing the indirect branch predictor interface
2019-02-08 22:31:27 +00:00
BranchPredictor.py
cpu: Fixed the indirect branch predictor GHR handling
2019-03-27 09:55:09 +00:00
btb.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
btb.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
indirect.cc
cpu: Fixed the indirect branch predictor GHR handling
2019-03-27 09:55:09 +00:00
indirect.hh
cpu: Fixed the indirect branch predictor GHR handling
2019-03-27 09:55:09 +00:00
loop_predictor.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
loop_predictor.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
ltage.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
ltage.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
ras.cc
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00
ras.hh
branch predictor: move out of o3 and inorder cpus
2013-01-24 12:28:51 -06:00
sat_counter.hh
misc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-12-04 23:10:55 +00:00
SConscript
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
statistical_corrector.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
statistical_corrector.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_base.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_base.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_sc_l_8KB.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_sc_l_8KB.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_sc_l_64KB.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_sc_l_64KB.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_sc_l.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage_sc_l.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage.cc
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tage.hh
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
2019-02-13 21:34:15 +00:00
tournament.cc
cpu: Proposal for changing the indirect branch predictor interface
2019-02-08 22:31:27 +00:00
tournament.hh
cpu: Proposal for changing the indirect branch predictor interface
2019-02-08 22:31:27 +00:00