Ron Dreslinski cc78d86661 Fix several bugs pertaining to upgrades/mem leaks. ...

src/mem/cache/base_cache.cc:
    Fix a bug about not having a request to send
src/mem/cache/base_cache.hh:
    Fix a bug with the blocking code
src/mem/cache/cache.hh:
    AFix a bug with snoop hits in WB buffer
src/mem/cache/cache_impl.hh:
    Fix a bug with snoop hits in WB buffer
    Also, add better DPRINTF's
src/mem/cache/miss/miss_queue.cc:
    Fix a bug with upgrades (Need to clean it up later)
src/mem/cache/miss/mshr.cc:
    Fix a memory leak bug, still some outstanding with writebacks not being deleted
src/mem/cache/miss/mshr_queue.cc:
    Fix a bug about upgrades (need to clean up later)
src/mem/packet.hh:
    Fix for newly added cmd attribute for upgrades
tests/configs/memtest.py:
    More interesting testcase

--HG--
extra : convert_revision : fcb4f17dd58b537bb4f67a8c835f50e455e8c688

2006-10-10 01:32:18 -04:00

..

memtest.py

Fix several bugs pertaining to upgrades/mem leaks.

2006-10-10 01:32:18 -04:00

o3-timing-mp.py

Update configs for cpu_id

2006-10-09 17:31:58 -04:00

o3-timing.py

Add o3-timing configuration for ALPHA_SE "Hello world" tests.

2006-09-01 17:59:36 -04:00

simple-atomic-mp.py

Update configs for cpu_id

2006-10-09 17:31:58 -04:00

simple-atomic.py

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00

simple-timing-mp.py

Update configs for cpu_id

2006-10-09 17:31:58 -04:00

simple-timing.py

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00

tsunami-simple-atomic-dual.py

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00

tsunami-simple-atomic.py

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00

tsunami-simple-timing-dual.py

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00

tsunami-simple-timing.py

Implement Alpha LL/SC support for SimpleCPU (Atomic & Timing)

2006-10-08 10:53:24 -07:00