Logo
Explore Help
Sign In
derek/gem5
1
0
Fork 0
You've already forked gem5
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
9e304ed3e6d96e2090981a8aa825dab5b662909a
gem5/arch
History
Korey Sewell 9e304ed3e6 minor comments to decoder.isa
arch/mips/isa/decoder.isa:
    comments

--HG--
extra : convert_revision : 8e4fdf36d7f7365cda062bc169a313bf860a4fe5
2006-03-09 02:34:12 -05:00
..
alpha
Working towards compiling SPARC_SE
2006-03-08 08:09:27 -05:00
mips
minor comments to decoder.isa
2006-03-09 02:34:12 -05:00
sparc
Working towards compiling SPARC_SE
2006-03-08 08:09:27 -05:00
isa_parser.py
Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
2006-03-03 15:28:25 -05:00
isa_specific.hh
Auto-generate arch/foo.hh "switch headers" in scons.
2006-02-22 22:22:06 -05:00
SConscript
Pushed ev5.hh out of the non-alpha code.
2006-03-07 14:08:01 -05:00
Powered by Gitea Version: 1.25.4 Page: 108ms Template: 11ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API