9c5373ca61
This patch splits up the riscv SE mode support for 32 and 64-bit. A future patch will add support for decoding rv32 instructions. Change-Id: Ia79ae19f753caf94dc7e5830a6630efb94b419d7 Signed-off-by: Austin Harris <austinharris@utexas.edu> Reviewed-on: https://gem5-review.googlesource.com/c/15355 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Alec Roelke <alec.roelke@gmail.com> Maintainer: Alec Roelke <alec.roelke@gmail.com>
79 lines
2.8 KiB
C++
79 lines
2.8 KiB
C++
/*
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* Copyright (c) 2006 The Regents of The University of Michigan
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* Copyright (c) 2017 The University of Virginia
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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* Ali Saidi
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* Alec Roelke
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*/
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#ifndef __RISCV_PROCESS_HH__
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#define __RISCV_PROCESS_HH__
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#include <string>
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#include <vector>
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#include "mem/page_table.hh"
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#include "sim/process.hh"
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class ObjectFile;
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class System;
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class RiscvProcess : public Process
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{
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protected:
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RiscvProcess(ProcessParams * params, ObjectFile *objFile);
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template<class IntType>
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void argsInit(int pageSize);
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public:
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RegVal getSyscallArg(ThreadContext *tc, int &i) override;
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/// Explicitly import the otherwise hidden getSyscallArg
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using Process::getSyscallArg;
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void setSyscallArg(ThreadContext *tc, int i, RegVal val) override;
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void setSyscallReturn(ThreadContext *tc,
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SyscallReturn return_value) override;
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virtual bool mmapGrowsDown() const override { return false; }
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};
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class RiscvProcess64 : public RiscvProcess
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{
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protected:
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RiscvProcess64(ProcessParams * params, ObjectFile *objFile);
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void initState() override;
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};
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class RiscvProcess32 : public RiscvProcess
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{
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protected:
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RiscvProcess32(ProcessParams * params, ObjectFile *objFile);
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void initState() override;
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};
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#endif // __RISCV_PROCESS_HH__
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