Apply the gem5 namespace to the codebase. Some anonymous namespaces could theoretically be removed, but since this change's main goal was to keep conflicts at a minimum, it was decided not to modify much the general shape of the files. A few missing comments of the form "// namespace X" that occurred before the newly added "} // namespace gem5" have been added for consistency. std out should not be included in the gem5 namespace, so they weren't. ProtoMessage has not been included in the gem5 namespace, since I'm not familiar with how proto works. Regarding the SystemC files, although they belong to gem5, they actually perform integration between gem5 and SystemC; therefore, it deserved its own separate namespace. Files that are automatically generated have been included in the gem5 namespace. The .isa files currently are limited to a single namespace. This limitation should be later removed to make it easier to accomodate a better API. Regarding the files in util, gem5:: was prepended where suitable. Notice that this patch was tested as much as possible given that most of these were already not previously compiling. Change-Id: Ia53d404ec79c46edaa98f654e23bc3b0e179fe2d Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46323 Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Matthew Poremba <matthew.poremba@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
265 lines
6.6 KiB
C++
265 lines
6.6 KiB
C++
/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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* Defines global host-dependent types:
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* Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
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*/
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#ifndef __BASE_TYPES_HH__
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#define __BASE_TYPES_HH__
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#include <inttypes.h>
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#include <cassert>
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#include <limits>
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#include <memory>
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#include <ostream>
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#include <stdexcept>
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namespace gem5
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{
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/** Statistics counter type. Not much excuse for not using a 64-bit
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* integer here, but if you're desperate and only run short
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* simulations you could make this 32 bits.
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*/
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typedef int64_t Counter;
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/**
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* Tick count type.
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*/
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typedef uint64_t Tick;
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const Tick MaxTick = 0xffffffffffffffffULL;
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/**
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* Cycles is a wrapper class for representing cycle counts, i.e. a
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* relative difference between two points in time, expressed in a
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* number of clock cycles.
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*
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* The Cycles wrapper class is a type-safe alternative to a
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* typedef, aiming to avoid unintentional mixing of cycles and ticks
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* in the code base.
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*
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* Note that there is no overloading of the bool operator as the
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* compiler is allowed to turn booleans into integers and this causes
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* a whole range of issues in a handful locations. The solution to
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* this problem would be to use the safe bool idiom, but for now we
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* make do without the test and use the more elaborate comparison >
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* Cycles(0).
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*/
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class Cycles
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{
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private:
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/** Member holding the actual value. */
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uint64_t c;
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public:
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/** Explicit constructor assigning a value. */
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explicit constexpr Cycles(uint64_t _c) : c(_c) { }
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/** Default constructor for parameter classes. */
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Cycles() : c(0) { }
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/** Converting back to the value type. */
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constexpr operator uint64_t() const { return c; }
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/** Prefix increment operator. */
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Cycles& operator++() { ++c; return *this; }
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/** Prefix decrement operator. Is only temporarily used in the O3 CPU. */
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Cycles& operator--() { assert(c != 0); --c; return *this; }
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/** In-place addition of cycles. */
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Cycles& operator+=(const Cycles& cc) { c += cc.c; return *this; }
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/** Greater than comparison used for > Cycles(0). */
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constexpr bool
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operator>(const Cycles& cc) const
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{
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return c > cc.c;
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}
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constexpr Cycles
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operator+(const Cycles& b) const
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{
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return Cycles(c + b.c);
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}
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constexpr Cycles
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operator-(const Cycles& b) const
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{
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return c >= b.c ? Cycles(c - b.c) :
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throw std::invalid_argument("RHS cycle value larger than LHS");
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}
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constexpr Cycles
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operator <<(const int32_t shift) const
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{
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return Cycles(c << shift);
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}
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constexpr Cycles
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operator >>(const int32_t shift) const
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{
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return Cycles(c >> shift);
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}
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friend std::ostream& operator<<(std::ostream &out, const Cycles & cycles);
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};
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/**
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* Address type
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* This will probably be moved somewhere else in the near future.
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* This should be at least as big as the biggest address width in use
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* in the system, which will probably be 64 bits.
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*/
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typedef uint64_t Addr;
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typedef uint16_t MicroPC;
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static const MicroPC MicroPCRomBit = 1 << (sizeof(MicroPC) * 8 - 1);
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static inline MicroPC
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romMicroPC(MicroPC upc)
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{
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return upc | MicroPCRomBit;
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}
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static inline MicroPC
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normalMicroPC(MicroPC upc)
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{
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return upc & ~MicroPCRomBit;
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}
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static inline bool
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isRomMicroPC(MicroPC upc)
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{
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return MicroPCRomBit & upc;
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}
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const Addr MaxAddr = (Addr)-1;
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using RegVal = uint64_t;
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// Logical register index type.
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using RegIndex = uint16_t;
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/** Logical vector register elem index type. */
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using ElemIndex = uint16_t;
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/** ElemIndex value that indicates that the register is not a vector. */
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static const ElemIndex IllegalElemIndex =
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std::numeric_limits<ElemIndex>::max();
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static inline uint32_t
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floatToBits32(float val)
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{
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union
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{
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float f;
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uint32_t i;
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} u;
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u.f = val;
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return u.i;
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}
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static inline uint64_t
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floatToBits64(double val)
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{
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union
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{
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double f;
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uint64_t i;
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} u;
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u.f = val;
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return u.i;
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}
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static inline uint64_t floatToBits(double val) { return floatToBits64(val); }
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static inline uint32_t floatToBits(float val) { return floatToBits32(val); }
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static inline float
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bitsToFloat32(uint32_t val)
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{
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union
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{
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float f;
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uint32_t i;
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} u;
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u.i = val;
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return u.f;
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}
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static inline double
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bitsToFloat64(uint64_t val)
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{
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union
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{
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double f;
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uint64_t i;
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} u;
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u.i = val;
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return u.f;
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}
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static inline double bitsToFloat(uint64_t val) { return bitsToFloat64(val); }
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static inline float bitsToFloat(uint32_t val) { return bitsToFloat32(val); }
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/**
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* Thread index/ID type
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*/
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typedef int16_t ThreadID;
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const ThreadID InvalidThreadID = (ThreadID)-1;
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/** Globally unique thread context ID */
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typedef int ContextID;
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const ContextID InvalidContextID = (ContextID)-1;
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/**
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* Port index/ID type, and a symbolic name for an invalid port id.
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*/
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typedef int16_t PortID;
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const PortID InvalidPortID = (PortID)-1;
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class FaultBase;
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typedef std::shared_ptr<FaultBase> Fault;
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// Rather than creating a shared_ptr instance and assigning it nullptr,
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// we just create an alias.
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constexpr decltype(nullptr) NoFault = nullptr;
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} // namespace gem5
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#endif // __BASE_TYPES_HH__
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