f6fc18f03d
SConscript:
easier to fix than temporarily remove
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
mem needed for both fullsys and syscall
dev/baddev.cc:
fix for new mem system
dev/io_device.cc:
fix typo
dev/io_device.hh:
PioDevice needs to be a memobject
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
fix for new mem systems
dev/platform.cc:
dev/platform.hh:
dev/tsunami.cc:
dev/tsunami.hh:
rather than the platform have a pointer to pciconfig, go the other
way so all devices are the same and can have a platform pointer
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_io.hh:
dev/tsunami_pchip.cc:
dev/tsunami_pchip.hh:
dev/uart8250.cc:
python/m5/objects/AlphaConsole.py:
python/m5/objects/BadDevice.py:
python/m5/objects/BaseCPU.py:
python/m5/objects/Device.py:
python/m5/objects/Pci.py:
python/m5/objects/PhysicalMemory.py:
python/m5/objects/System.py:
python/m5/objects/Tsunami.py:
python/m5/objects/Uart.py:
fixes for newmem
--HG--
extra : convert_revision : b7b67e19095cca64889f6307725aa2f3d84c7105
74 lines
2.6 KiB
C++
74 lines
2.6 KiB
C++
/*
|
|
* Copyright (c) 2004-2005 The Regents of The University of Michigan
|
|
* All rights reserved.
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions are
|
|
* met: redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer;
|
|
* redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
* documentation and/or other materials provided with the distribution;
|
|
* neither the name of the copyright holders nor the names of its
|
|
* contributors may be used to endorse or promote products derived from
|
|
* this software without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*/
|
|
|
|
/**
|
|
* @file
|
|
* Generic interface for platforms
|
|
*/
|
|
|
|
#ifndef __DEV_PLATFORM_HH__
|
|
#define __DEV_PLATFORM_HH__
|
|
|
|
#include "sim/sim_object.hh"
|
|
#include "arch/isa_traits.hh"
|
|
|
|
class PciConfigAll;
|
|
class IntrControl;
|
|
class SimConsole;
|
|
class Uart;
|
|
class System;
|
|
|
|
class Platform : public SimObject
|
|
{
|
|
public:
|
|
/** Pointer to the interrupt controller */
|
|
IntrControl *intrctrl;
|
|
|
|
/** Pointer to the PCI configuration space */
|
|
PciConfigAll *pciconfig;
|
|
|
|
/** Pointer to the UART, set by the uart */
|
|
Uart *uart;
|
|
|
|
/** Pointer to the system for info about the memory system. */
|
|
System *system;
|
|
|
|
public:
|
|
Platform(const std::string &name, IntrControl *intctrl);
|
|
virtual ~Platform();
|
|
virtual void init() { if (pciconfig == NULL) panic("PCI Config not set"); }
|
|
virtual void postConsoleInt() = 0;
|
|
virtual void clearConsoleInt() = 0;
|
|
virtual Tick intrFrequency() = 0;
|
|
virtual void postPciInt(int line);
|
|
virtual void clearPciInt(int line);
|
|
virtual Addr pciToDma(Addr pciAddr) const;
|
|
};
|
|
|
|
#endif // __DEV_PLATFORM_HH__
|