b3254e142f
This DPRINTF accesses the ExtMachInst typed machInst member of the StaticInst class, and so is ISA dependent. Move the DPRINTF to where the instructions are actually decoded where that type doesn't have to be disambiguated. Also, this change makes this DPRINTF more accurate, since microops are not really "decoded" when they are extracted from a macroop. The process of unpacking them to feed into the rest of the CPU should be fairly trivial, so really they're just being retrieved. With the DPRINTF in this new position, it will only trigger when an instruction is actually decoded from memory. Change-Id: I14145165b93bb004057a729fa7909cd2d3d34d29 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40099 Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
744 lines
21 KiB
C++
744 lines
21 KiB
C++
/*
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* Copyright (c) 2011 Google
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "arch/x86/decoder.hh"
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#include "arch/x86/regs/misc.hh"
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#include "base/logging.hh"
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#include "base/trace.hh"
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#include "base/types.hh"
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#include "debug/Decode.hh"
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#include "debug/Decoder.hh"
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namespace X86ISA
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{
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X86ISAInst::MicrocodeRom Decoder::microcodeRom;
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Decoder::State
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Decoder::doResetState()
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{
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origPC = basePC + offset;
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DPRINTF(Decoder, "Setting origPC to %#x\n", origPC);
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instBytes = &decodePages->lookup(origPC);
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chunkIdx = 0;
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emi.rex = 0;
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emi.legacy = 0;
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emi.vex = 0;
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emi.opcode.type = BadOpcode;
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emi.opcode.op = 0;
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immediateCollected = 0;
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emi.immediate = 0;
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emi.displacement = 0;
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emi.dispSize = 0;
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emi.modRM = 0;
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emi.sib = 0;
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if (instBytes->si) {
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return FromCacheState;
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} else {
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instBytes->chunks.clear();
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return PrefixState;
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}
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}
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void
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Decoder::process()
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{
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// This function drives the decoder state machine.
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// Some sanity checks. You shouldn't try to process more bytes if
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// there aren't any, and you shouldn't overwrite an already decoded
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// ExtMachInst.
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assert(!outOfBytes);
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assert(!instDone);
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if (state == ResetState)
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state = doResetState();
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if (state == FromCacheState) {
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state = doFromCacheState();
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} else {
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instBytes->chunks.push_back(fetchChunk);
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}
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// While there's still something to do...
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while (!instDone && !outOfBytes) {
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uint8_t nextByte = getNextByte();
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switch (state) {
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case PrefixState:
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state = doPrefixState(nextByte);
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break;
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case Vex2Of2State:
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state = doVex2Of2State(nextByte);
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break;
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case Vex2Of3State:
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state = doVex2Of3State(nextByte);
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break;
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case Vex3Of3State:
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state = doVex3Of3State(nextByte);
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break;
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case VexOpcodeState:
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state = doVexOpcodeState(nextByte);
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break;
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case OneByteOpcodeState:
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state = doOneByteOpcodeState(nextByte);
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break;
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case TwoByteOpcodeState:
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state = doTwoByteOpcodeState(nextByte);
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break;
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case ThreeByte0F38OpcodeState:
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state = doThreeByte0F38OpcodeState(nextByte);
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break;
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case ThreeByte0F3AOpcodeState:
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state = doThreeByte0F3AOpcodeState(nextByte);
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break;
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case ModRMState:
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state = doModRMState(nextByte);
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break;
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case SIBState:
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state = doSIBState(nextByte);
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break;
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case DisplacementState:
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state = doDisplacementState();
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break;
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case ImmediateState:
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state = doImmediateState();
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break;
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case ErrorState:
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panic("Went to the error state in the decoder.\n");
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default:
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panic("Unrecognized state! %d\n", state);
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}
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}
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}
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Decoder::State
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Decoder::doFromCacheState()
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{
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DPRINTF(Decoder, "Looking at cache state.\n");
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if ((fetchChunk & instBytes->masks[chunkIdx]) !=
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instBytes->chunks[chunkIdx]) {
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DPRINTF(Decoder, "Decode cache miss.\n");
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// The chached chunks didn't match what was fetched. Fall back to the
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// predecoder.
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instBytes->chunks[chunkIdx] = fetchChunk;
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instBytes->chunks.resize(chunkIdx + 1);
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instBytes->si = NULL;
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chunkIdx = 0;
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fetchChunk = instBytes->chunks[0];
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offset = origPC % sizeof(MachInst);
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basePC = origPC - offset;
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return PrefixState;
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} else if (chunkIdx == instBytes->chunks.size() - 1) {
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// We matched the cache, so use its value.
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instDone = true;
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offset = instBytes->lastOffset;
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if (offset == sizeof(MachInst))
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outOfBytes = true;
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return ResetState;
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} else {
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// We matched so far, but need to check more chunks.
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chunkIdx++;
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outOfBytes = true;
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return FromCacheState;
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}
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}
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// Either get a prefix and record it in the ExtMachInst, or send the
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// state machine on to get the opcode(s).
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Decoder::State
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Decoder::doPrefixState(uint8_t nextByte)
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{
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uint8_t prefix = Prefixes[nextByte];
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State nextState = PrefixState;
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// REX prefixes are only recognized in 64 bit mode.
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if (prefix == RexPrefix && emi.mode.submode != SixtyFourBitMode)
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prefix = 0;
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if (prefix)
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consumeByte();
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switch(prefix) {
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// Operand size override prefixes
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case OperandSizeOverride:
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DPRINTF(Decoder, "Found operand size override prefix.\n");
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emi.legacy.op = true;
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break;
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case AddressSizeOverride:
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DPRINTF(Decoder, "Found address size override prefix.\n");
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emi.legacy.addr = true;
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break;
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// Segment override prefixes
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case CSOverride:
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case DSOverride:
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case ESOverride:
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case FSOverride:
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case GSOverride:
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case SSOverride:
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DPRINTF(Decoder, "Found segment override.\n");
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emi.legacy.seg = prefix;
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break;
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case Lock:
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DPRINTF(Decoder, "Found lock prefix.\n");
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emi.legacy.lock = true;
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break;
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case Rep:
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DPRINTF(Decoder, "Found rep prefix.\n");
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emi.legacy.rep = true;
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break;
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case Repne:
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DPRINTF(Decoder, "Found repne prefix.\n");
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emi.legacy.repne = true;
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break;
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case RexPrefix:
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DPRINTF(Decoder, "Found Rex prefix %#x.\n", nextByte);
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emi.rex = nextByte;
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break;
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case Vex2Prefix:
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DPRINTF(Decoder, "Found VEX two-byte prefix %#x.\n", nextByte);
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emi.vex.present = 1;
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nextState = Vex2Of2State;
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break;
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case Vex3Prefix:
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DPRINTF(Decoder, "Found VEX three-byte prefix %#x.\n", nextByte);
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emi.vex.present = 1;
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nextState = Vex2Of3State;
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break;
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case 0:
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nextState = OneByteOpcodeState;
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break;
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default:
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panic("Unrecognized prefix %#x\n", nextByte);
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}
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return nextState;
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}
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Decoder::State
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Decoder::doVex2Of2State(uint8_t nextByte)
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{
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consumeByte();
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Vex2Of2 vex = nextByte;
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emi.rex.r = !vex.r;
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emi.vex.l = vex.l;
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emi.vex.v = ~vex.v;
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switch (vex.p) {
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case 0:
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break;
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case 1:
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emi.legacy.op = 1;
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break;
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case 2:
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emi.legacy.rep = 1;
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break;
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case 3:
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emi.legacy.repne = 1;
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break;
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}
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emi.opcode.type = TwoByteOpcode;
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return VexOpcodeState;
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}
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Decoder::State
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Decoder::doVex2Of3State(uint8_t nextByte)
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{
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if (emi.mode.submode != SixtyFourBitMode && bits(nextByte, 7, 6) == 0x3) {
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// This was actually an LDS instruction. Reroute to that path.
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emi.vex.present = 0;
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emi.opcode.type = OneByteOpcode;
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emi.opcode.op = 0xC4;
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return processOpcode(ImmediateTypeOneByte, UsesModRMOneByte,
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nextByte >= 0xA0 && nextByte <= 0xA3);
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}
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consumeByte();
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Vex2Of3 vex = nextByte;
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emi.rex.r = !vex.r;
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emi.rex.x = !vex.x;
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emi.rex.b = !vex.b;
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switch (vex.m) {
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case 1:
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emi.opcode.type = TwoByteOpcode;
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break;
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case 2:
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emi.opcode.type = ThreeByte0F38Opcode;
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break;
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case 3:
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emi.opcode.type = ThreeByte0F3AOpcode;
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break;
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default:
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// These encodings are reserved. Pretend this was an undefined
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// instruction so the main decoder will behave correctly, and stop
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// trying to interpret bytes.
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emi.opcode.type = TwoByteOpcode;
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emi.opcode.op = 0x0B;
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instDone = true;
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return ResetState;
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}
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return Vex3Of3State;
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}
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Decoder::State
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Decoder::doVex3Of3State(uint8_t nextByte)
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{
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if (emi.mode.submode != SixtyFourBitMode && bits(nextByte, 7, 6) == 0x3) {
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// This was actually an LES instruction. Reroute to that path.
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emi.vex.present = 0;
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emi.opcode.type = OneByteOpcode;
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emi.opcode.op = 0xC5;
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return processOpcode(ImmediateTypeOneByte, UsesModRMOneByte,
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nextByte >= 0xA0 && nextByte <= 0xA3);
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}
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consumeByte();
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Vex3Of3 vex = nextByte;
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emi.rex.w = vex.w;
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emi.vex.l = vex.l;
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emi.vex.v = ~vex.v;
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switch (vex.p) {
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case 0:
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break;
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case 1:
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emi.legacy.op = 1;
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break;
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case 2:
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emi.legacy.rep = 1;
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break;
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case 3:
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emi.legacy.repne = 1;
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break;
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}
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return VexOpcodeState;
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}
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Decoder::State
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Decoder::doVexOpcodeState(uint8_t nextByte)
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{
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DPRINTF(Decoder, "Found VEX opcode %#x.\n", nextByte);
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emi.opcode.op = nextByte;
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consumeByte();
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switch (emi.opcode.type) {
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case TwoByteOpcode:
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return processOpcode(ImmediateTypeTwoByte, UsesModRMTwoByte);
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case ThreeByte0F38Opcode:
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return processOpcode(ImmediateTypeThreeByte0F38,
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UsesModRMThreeByte0F38);
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case ThreeByte0F3AOpcode:
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return processOpcode(ImmediateTypeThreeByte0F3A,
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UsesModRMThreeByte0F3A);
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default:
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panic("Unrecognized opcode type %d.\n", emi.opcode.type);
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}
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}
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// Load the first opcode byte. Determine if there are more opcode bytes, and
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// if not, what immediate and/or ModRM is needed.
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Decoder::State
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Decoder::doOneByteOpcodeState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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consumeByte();
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if (nextByte == 0x0f) {
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DPRINTF(Decoder, "Found opcode escape byte %#x.\n", nextByte);
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nextState = TwoByteOpcodeState;
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} else {
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DPRINTF(Decoder, "Found one byte opcode %#x.\n", nextByte);
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emi.opcode.type = OneByteOpcode;
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emi.opcode.op = nextByte;
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nextState = processOpcode(ImmediateTypeOneByte, UsesModRMOneByte,
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nextByte >= 0xA0 && nextByte <= 0xA3);
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}
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return nextState;
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}
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// Load the second opcode byte. Determine if there are more opcode bytes, and
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// if not, what immediate and/or ModRM is needed.
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Decoder::State
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Decoder::doTwoByteOpcodeState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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consumeByte();
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if (nextByte == 0x38) {
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nextState = ThreeByte0F38OpcodeState;
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DPRINTF(Decoder, "Found opcode escape byte %#x.\n", nextByte);
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} else if (nextByte == 0x3a) {
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nextState = ThreeByte0F3AOpcodeState;
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DPRINTF(Decoder, "Found opcode escape byte %#x.\n", nextByte);
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} else {
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DPRINTF(Decoder, "Found two byte opcode %#x.\n", nextByte);
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emi.opcode.type = TwoByteOpcode;
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emi.opcode.op = nextByte;
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nextState = processOpcode(ImmediateTypeTwoByte, UsesModRMTwoByte);
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}
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return nextState;
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}
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// Load the third opcode byte and determine what immediate and/or ModRM is
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// needed.
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Decoder::State
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Decoder::doThreeByte0F38OpcodeState(uint8_t nextByte)
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{
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consumeByte();
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DPRINTF(Decoder, "Found three byte 0F38 opcode %#x.\n", nextByte);
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emi.opcode.type = ThreeByte0F38Opcode;
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emi.opcode.op = nextByte;
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return processOpcode(ImmediateTypeThreeByte0F38, UsesModRMThreeByte0F38);
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}
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// Load the third opcode byte and determine what immediate and/or ModRM is
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// needed.
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Decoder::State
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Decoder::doThreeByte0F3AOpcodeState(uint8_t nextByte)
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{
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consumeByte();
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DPRINTF(Decoder, "Found three byte 0F3A opcode %#x.\n", nextByte);
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emi.opcode.type = ThreeByte0F3AOpcode;
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emi.opcode.op = nextByte;
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return processOpcode(ImmediateTypeThreeByte0F3A, UsesModRMThreeByte0F3A);
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}
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// Generic opcode processing which determines the immediate size, and whether
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// or not there's a modrm byte.
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Decoder::State
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Decoder::processOpcode(ByteTable &immTable, ByteTable &modrmTable,
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bool addrSizedImm)
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{
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State nextState = ErrorState;
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const uint8_t opcode = emi.opcode.op;
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// Figure out the effective operand size. This can be overriden to
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// a fixed value at the decoder level.
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int logOpSize;
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if (emi.rex.w)
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logOpSize = 3; // 64 bit operand size
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else if (emi.legacy.op)
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logOpSize = altOp;
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else
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logOpSize = defOp;
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// Set the actual op size.
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emi.opSize = 1 << logOpSize;
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// Figure out the effective address size. This can be overriden to
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// a fixed value at the decoder level.
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int logAddrSize;
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if (emi.legacy.addr)
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logAddrSize = altAddr;
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else
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logAddrSize = defAddr;
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// Set the actual address size.
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emi.addrSize = 1 << logAddrSize;
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// Figure out the effective stack width. This can be overriden to
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// a fixed value at the decoder level.
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emi.stackSize = 1 << stack;
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// Figure out how big of an immediate we'll retreive based
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// on the opcode.
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int immType = immTable[opcode];
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if (addrSizedImm)
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immediateSize = SizeTypeToSize[logAddrSize - 1][immType];
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else
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immediateSize = SizeTypeToSize[logOpSize - 1][immType];
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// Determine what to expect next.
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if (modrmTable[opcode]) {
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nextState = ModRMState;
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} else {
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if (immediateSize) {
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nextState = ImmediateState;
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} else {
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instDone = true;
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nextState = ResetState;
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}
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}
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return nextState;
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}
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// Get the ModRM byte and determine what displacement, if any, there is.
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// Also determine whether or not to get the SIB byte, displacement, or
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// immediate next.
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Decoder::State
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Decoder::doModRMState(uint8_t nextByte)
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{
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State nextState = ErrorState;
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ModRM modRM = nextByte;
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DPRINTF(Decoder, "Found modrm byte %#x.\n", nextByte);
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if (defOp == 1) {
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// Figure out 16 bit displacement size.
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if ((modRM.mod == 0 && modRM.rm == 6) || modRM.mod == 2)
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displacementSize = 2;
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else if (modRM.mod == 1)
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displacementSize = 1;
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else
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|
displacementSize = 0;
|
|
} else {
|
|
// Figure out 32/64 bit displacement size.
|
|
if ((modRM.mod == 0 && modRM.rm == 5) || modRM.mod == 2)
|
|
displacementSize = 4;
|
|
else if (modRM.mod == 1)
|
|
displacementSize = 1;
|
|
else
|
|
displacementSize = 0;
|
|
}
|
|
|
|
// The "test" instruction in group 3 needs an immediate, even though
|
|
// the other instructions with the same actual opcode don't.
|
|
if (emi.opcode.type == OneByteOpcode && (modRM.reg & 0x6) == 0) {
|
|
if (emi.opcode.op == 0xF6)
|
|
immediateSize = 1;
|
|
else if (emi.opcode.op == 0xF7)
|
|
immediateSize = (emi.opSize == 8) ? 4 : emi.opSize;
|
|
}
|
|
|
|
// If there's an SIB, get that next.
|
|
// There is no SIB in 16 bit mode.
|
|
if (modRM.rm == 4 && modRM.mod != 3) {
|
|
// && in 32/64 bit mode)
|
|
nextState = SIBState;
|
|
} else if (displacementSize) {
|
|
nextState = DisplacementState;
|
|
} else if (immediateSize) {
|
|
nextState = ImmediateState;
|
|
} else {
|
|
instDone = true;
|
|
nextState = ResetState;
|
|
}
|
|
// The ModRM byte is consumed no matter what.
|
|
consumeByte();
|
|
emi.modRM = modRM;
|
|
return nextState;
|
|
}
|
|
|
|
// Get the SIB byte. We don't do anything with it at this point, other
|
|
// than storing it in the ExtMachInst. Determine if we need to get a
|
|
// displacement or immediate next.
|
|
Decoder::State
|
|
Decoder::doSIBState(uint8_t nextByte)
|
|
{
|
|
State nextState = ErrorState;
|
|
emi.sib = nextByte;
|
|
DPRINTF(Decoder, "Found SIB byte %#x.\n", nextByte);
|
|
consumeByte();
|
|
if (emi.modRM.mod == 0 && emi.sib.base == 5)
|
|
displacementSize = 4;
|
|
if (displacementSize) {
|
|
nextState = DisplacementState;
|
|
} else if (immediateSize) {
|
|
nextState = ImmediateState;
|
|
} else {
|
|
instDone = true;
|
|
nextState = ResetState;
|
|
}
|
|
return nextState;
|
|
}
|
|
|
|
// Gather up the displacement, or at least as much of it as we can get.
|
|
Decoder::State
|
|
Decoder::doDisplacementState()
|
|
{
|
|
State nextState = ErrorState;
|
|
|
|
getImmediate(immediateCollected,
|
|
emi.displacement,
|
|
displacementSize);
|
|
|
|
DPRINTF(Decoder, "Collecting %d byte displacement, got %d bytes.\n",
|
|
displacementSize, immediateCollected);
|
|
|
|
if (displacementSize == immediateCollected) {
|
|
// Reset this for other immediates.
|
|
immediateCollected = 0;
|
|
// Sign extend the displacement.
|
|
switch(displacementSize)
|
|
{
|
|
case 1:
|
|
emi.displacement = sext<8>(emi.displacement);
|
|
break;
|
|
case 2:
|
|
emi.displacement = sext<16>(emi.displacement);
|
|
break;
|
|
case 4:
|
|
emi.displacement = sext<32>(emi.displacement);
|
|
break;
|
|
default:
|
|
panic("Undefined displacement size!\n");
|
|
}
|
|
DPRINTF(Decoder, "Collected displacement %#x.\n",
|
|
emi.displacement);
|
|
if (immediateSize) {
|
|
nextState = ImmediateState;
|
|
} else {
|
|
instDone = true;
|
|
nextState = ResetState;
|
|
}
|
|
|
|
emi.dispSize = displacementSize;
|
|
}
|
|
else
|
|
nextState = DisplacementState;
|
|
return nextState;
|
|
}
|
|
|
|
// Gather up the immediate, or at least as much of it as we can get.
|
|
Decoder::State
|
|
Decoder::doImmediateState()
|
|
{
|
|
State nextState = ErrorState;
|
|
|
|
getImmediate(immediateCollected, emi.immediate, immediateSize);
|
|
|
|
DPRINTF(Decoder, "Collecting %d byte immediate, got %d bytes.\n",
|
|
immediateSize, immediateCollected);
|
|
|
|
if (immediateSize == immediateCollected) {
|
|
// Reset this for other immediates.
|
|
immediateCollected = 0;
|
|
|
|
//XXX Warning! The following is an observed pattern and might
|
|
// not always be true!
|
|
|
|
// Instructions which use 64 bit operands but 32 bit immediates
|
|
// need to have the immediate sign extended to 64 bits.
|
|
// Instructions which use true 64 bit immediates won't be
|
|
// affected, and instructions that use true 32 bit immediates
|
|
// won't notice.
|
|
switch(immediateSize) {
|
|
case 4:
|
|
emi.immediate = sext<32>(emi.immediate);
|
|
break;
|
|
case 1:
|
|
emi.immediate = sext<8>(emi.immediate);
|
|
}
|
|
|
|
DPRINTF(Decoder, "Collected immediate %#x.\n",
|
|
emi.immediate);
|
|
instDone = true;
|
|
nextState = ResetState;
|
|
} else {
|
|
nextState = ImmediateState;
|
|
}
|
|
return nextState;
|
|
}
|
|
|
|
Decoder::InstBytes Decoder::dummy;
|
|
Decoder::InstCacheMap Decoder::instCacheMap;
|
|
|
|
StaticInstPtr
|
|
Decoder::decode(ExtMachInst mach_inst, Addr addr)
|
|
{
|
|
StaticInstPtr si;
|
|
|
|
auto iter = instMap->find(mach_inst);
|
|
if (iter != instMap->end()) {
|
|
si = iter->second;
|
|
} else {
|
|
si = decodeInst(mach_inst);
|
|
(*instMap)[mach_inst] = si;
|
|
}
|
|
|
|
DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
|
|
si->getName(), mach_inst);
|
|
return si;
|
|
}
|
|
|
|
StaticInstPtr
|
|
Decoder::decode(PCState &nextPC)
|
|
{
|
|
if (!instDone)
|
|
return NULL;
|
|
instDone = false;
|
|
updateNPC(nextPC);
|
|
|
|
StaticInstPtr &si = instBytes->si;
|
|
if (si)
|
|
return si;
|
|
|
|
// We didn't match in the AddrMap, but we still populated an entry. Fix
|
|
// up its byte masks.
|
|
const int chunkSize = sizeof(MachInst);
|
|
|
|
instBytes->lastOffset = offset;
|
|
|
|
Addr firstBasePC = basePC - (instBytes->chunks.size() - 1) * chunkSize;
|
|
Addr firstOffset = origPC - firstBasePC;
|
|
Addr totalSize = instBytes->lastOffset - firstOffset +
|
|
(instBytes->chunks.size() - 1) * chunkSize;
|
|
int start = firstOffset;
|
|
instBytes->masks.clear();
|
|
|
|
while (totalSize) {
|
|
int end = start + totalSize;
|
|
end = (chunkSize < end) ? chunkSize : end;
|
|
int size = end - start;
|
|
int idx = instBytes->masks.size();
|
|
|
|
MachInst maskVal = mask(size * 8) << (start * 8);
|
|
assert(maskVal);
|
|
|
|
instBytes->masks.push_back(maskVal);
|
|
instBytes->chunks[idx] &= instBytes->masks[idx];
|
|
totalSize -= size;
|
|
start = 0;
|
|
}
|
|
|
|
si = decode(emi, origPC);
|
|
return si;
|
|
}
|
|
|
|
StaticInstPtr
|
|
Decoder::fetchRomMicroop(MicroPC micropc, StaticInstPtr curMacroop)
|
|
{
|
|
return microcodeRom.fetchMicroop(micropc, curMacroop);
|
|
}
|
|
|
|
}
|