df82a2d003
Re-organizes the prefetcher class structure. Previously the BasePrefetcher forced multiple assumptions on the prefetchers that inherited from it. This patch makes the BasePrefetcher class truly representative of base functionality. For example, the base class no longer enforces FIFO order. Instead, prefetchers with FIFO requests (like the existing stride and tagged prefetchers) now inherit from a new QueuedPrefetcher base class. Finally, the stride-based prefetcher now assumes a custimizable lookup table (sets/ways) rather than the previous fully associative structure.
93 lines
4.3 KiB
Python
93 lines
4.3 KiB
Python
# Copyright (c) 2012, 2014 ARM Limited
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Copyright (c) 2005 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Ron Dreslinski
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# Mitch Hayenga
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from ClockedObject import ClockedObject
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from m5.params import *
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from m5.proxy import *
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class BasePrefetcher(ClockedObject):
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type = 'BasePrefetcher'
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abstract = True
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cxx_header = "mem/cache/prefetch/base.hh"
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sys = Param.System(Parent.any, "System this prefetcher belongs to")
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on_miss = Param.Bool(False, "Only notify prefetcher on misses")
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on_read = Param.Bool(True, "Notify prefetcher on reads")
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on_write = Param.Bool(True, "Notify prefetcher on writes")
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on_data = Param.Bool(True, "Notify prefetcher on data accesses")
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on_inst = Param.Bool(True, "Notify prefetcher on instruction accesses")
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class QueuedPrefetcher(BasePrefetcher):
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type = "QueuedPrefetcher"
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abstract = True
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cxx_class = "QueuedPrefetcher"
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cxx_header = "mem/cache/prefetch/queued.hh"
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latency = Param.Int(1, "Latency for generated prefetches")
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queue_size = Param.Int(32, "Maximum number of queued prefetches")
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queue_squash = Param.Bool(True, "Squash queued prefetch on demand access")
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queue_filter = Param.Bool(True, "Don't queue redundant prefetches")
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cache_snoop = Param.Bool(False, "Snoop cache to eliminate redundant request")
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tag_prefetch = Param.Bool(True, "Tag prefetch with PC of generating access")
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class StridePrefetcher(QueuedPrefetcher):
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type = 'StridePrefetcher'
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cxx_class = 'StridePrefetcher'
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cxx_header = "mem/cache/prefetch/stride.hh"
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max_conf = Param.Int(7, "Maximum confidence level")
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thresh_conf = Param.Int(4, "Threshold confidence level")
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min_conf = Param.Int(0, "Minimum confidence level")
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start_conf = Param.Int(4, "Starting confidence for new entries")
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table_sets = Param.Int(16, "Number of sets in PC lookup table")
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table_assoc = Param.Int(4, "Associativity of PC lookup table")
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use_master_id = Param.Bool(True, "Use master id based history")
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degree = Param.Int(4, "Number of prefetches to generate")
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class TaggedPrefetcher(QueuedPrefetcher):
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type = 'TaggedPrefetcher'
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cxx_class = 'TaggedPrefetcher'
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cxx_header = "mem/cache/prefetch/tagged.hh"
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degree = Param.Int(2, "Number of prefetches to generate")
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