974a47dfb9
Apply the gem5 namespace to the codebase. Some anonymous namespaces could theoretically be removed, but since this change's main goal was to keep conflicts at a minimum, it was decided not to modify much the general shape of the files. A few missing comments of the form "// namespace X" that occurred before the newly added "} // namespace gem5" have been added for consistency. std out should not be included in the gem5 namespace, so they weren't. ProtoMessage has not been included in the gem5 namespace, since I'm not familiar with how proto works. Regarding the SystemC files, although they belong to gem5, they actually perform integration between gem5 and SystemC; therefore, it deserved its own separate namespace. Files that are automatically generated have been included in the gem5 namespace. The .isa files currently are limited to a single namespace. This limitation should be later removed to make it easier to accomodate a better API. Regarding the files in util, gem5:: was prepended where suitable. Notice that this patch was tested as much as possible given that most of these were already not previously compiling. Change-Id: Ia53d404ec79c46edaa98f654e23bc3b0e179fe2d Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46323 Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Matthew Poremba <matthew.poremba@amd.com> Tested-by: kokoro <noreply+kokoro@google.com>
112 lines
3.7 KiB
C++
112 lines
3.7 KiB
C++
/*
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* Copyright (c) 2014, 2017 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_ARM_ISA_DEVICE_HH__
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#define __ARCH_ARM_ISA_DEVICE_HH__
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#include "base/compiler.hh"
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#include "base/types.hh"
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namespace gem5
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{
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class ThreadContext;
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namespace ArmISA
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{
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class ISA;
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/**
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* Base class for devices that use the MiscReg interfaces.
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*
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* This class provides a well-defined interface that the ArmISA class
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* can use when forwarding MiscReg accesses to a device model (e.g., a
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* PMU or GIC).
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*/
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class BaseISADevice
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{
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public:
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BaseISADevice();
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virtual ~BaseISADevice() {}
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virtual void setISA(ISA *isa);
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virtual void setThreadContext(ThreadContext *tc) {}
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/**
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* Write to a system register belonging to this device.
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*
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* @param misc_reg Register number (see regs/misc.hh)
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* @param val Value to store
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*/
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virtual void setMiscReg(int misc_reg, RegVal val) = 0;
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/**
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* Read a system register belonging to this device.
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*
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* @param misc_reg Register number (see regs/misc.hh)
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* @return Register value.
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*/
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virtual RegVal readMiscReg(int misc_reg) = 0;
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protected:
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ISA *isa;
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};
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/**
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* Dummy device that prints a warning when it is accessed.
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*
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* This device can be used as a placeholder when a real device model
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* is not present. For example, the ISA code uses it to avoid having
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* to check for a PMU in the register access code.
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*/
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class DummyISADevice : public BaseISADevice
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{
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public:
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DummyISADevice()
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: BaseISADevice() {}
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~DummyISADevice() {}
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void setMiscReg(int misc_reg, RegVal val) override;
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RegVal readMiscReg(int misc_reg) override;
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};
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} // namespace ArmISA
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} // namespace gem5
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#endif // __ARCH_ARM_ISA_DEVICE_HH__
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