Change-Id: Ifabd1e7178b5250767a2b560b57570512b732278 Signed-off-by: Sandipan Das <sandipan@linux.ibm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40948 Reviewed-by: Boris Shingarov <shingarov@labware.com> Maintainer: Boris Shingarov <shingarov@labware.com> Tested-by: kokoro <noreply+kokoro@google.com>
369 lines
13 KiB
C++
369 lines
13 KiB
C++
/*
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* Copyright (c) 2007-2008 The Florida State University
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* Copyright (c) 2009 The University of Edinburgh
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* Copyright (c) 2021 IBM Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "arch/power/process.hh"
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#include "arch/power/page_size.hh"
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#include "arch/power/regs/int.hh"
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#include "arch/power/regs/misc.hh"
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#include "arch/power/types.hh"
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#include "base/loader/elf_object.hh"
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#include "base/loader/object_file.hh"
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#include "base/logging.hh"
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#include "cpu/thread_context.hh"
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#include "debug/Stack.hh"
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#include "mem/page_table.hh"
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#include "params/Process.hh"
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#include "sim/aux_vector.hh"
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#include "sim/byteswap.hh"
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#include "sim/process_impl.hh"
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#include "sim/syscall_return.hh"
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#include "sim/system.hh"
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namespace gem5
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{
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using namespace PowerISA;
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PowerProcess::PowerProcess(
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const ProcessParams ¶ms, loader::ObjectFile *objFile)
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: Process(params,
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new EmulationPageTable(params.name, params.pid, PageBytes),
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objFile)
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{
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fatal_if(params.useArchPT, "Arch page tables not implemented.");
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// Set up break point (Top of Heap)
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Addr brk_point = image.maxAddr();
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brk_point = roundUp(brk_point, PageBytes);
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Addr stack_base = 0xbf000000L;
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Addr max_stack_size = 8 * 1024 * 1024;
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// Set pointer for next thread stack. Reserve 8M for main stack.
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Addr next_thread_stack_base = stack_base - max_stack_size;
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// Set up region for mmaps. For now, start at bottom of kuseg space.
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Addr mmap_end = 0x70000000L;
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memState = std::make_shared<MemState>(
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this, brk_point, stack_base, max_stack_size,
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next_thread_stack_base, mmap_end);
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}
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void
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PowerProcess::initState()
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{
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Process::initState();
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if (objFile->getArch() == loader::Power)
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argsInit<uint32_t>(PageBytes);
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else
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argsInit<uint64_t>(PageBytes);
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// Fix up entry point and symbol table for 64-bit ELF ABI v1
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if (objFile->getOpSys() != loader::LinuxPower64ABIv1)
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return;
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// Fix entry point address and the base TOC pointer by looking the
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// the function descriptor in the .opd section
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Addr entryPoint, tocBase;
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ByteOrder byteOrder = objFile->getByteOrder();
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ThreadContext *tc = system->threads[contextIds[0]];
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// The first doubleword of the descriptor contains the address of the
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// entry point of the function
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initVirtMem->readBlob(getStartPC(), &entryPoint, sizeof(Addr));
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// Update the PC state
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auto pc = tc->pcState();
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pc.byteOrder(byteOrder);
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pc.set(gtoh(entryPoint, byteOrder));
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tc->pcState(pc);
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// The second doubleword of the descriptor contains the TOC base
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// address for the function
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initVirtMem->readBlob(getStartPC() + 8, &tocBase, sizeof(Addr));
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tc->setIntReg(TOCPointerReg, gtoh(tocBase, byteOrder));
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// Fix symbol table entries as they would otherwise point to the
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// function descriptor rather than the actual entry point address
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auto *symbolTable = new loader::SymbolTable;
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for (auto sym : loader::debugSymbolTable) {
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Addr entry;
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loader::Symbol symbol = sym;
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// Try to read entry point from function descriptor
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if (initVirtMem->tryReadBlob(sym.address, &entry, sizeof(Addr)))
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symbol.address = gtoh(entry, byteOrder);
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symbolTable->insert(symbol);
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}
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// Replace the current debug symbol table
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loader::debugSymbolTable.clear();
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loader::debugSymbolTable.insert(*symbolTable);
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delete symbolTable;
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}
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template <typename IntType>
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void
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PowerProcess::argsInit(int pageSize)
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{
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int intSize = sizeof(IntType);
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ByteOrder byteOrder = objFile->getByteOrder();
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bool is64bit = (objFile->getArch() == loader::Power64);
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bool isLittleEndian = (byteOrder == ByteOrder::little);
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std::vector<gem5::auxv::AuxVector<IntType>> auxv;
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std::string filename;
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if (argv.size() < 1)
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filename = "";
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else
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filename = argv[0];
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//We want 16 byte alignment
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uint64_t align = 16;
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// load object file into target memory
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image.write(*initVirtMem);
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interpImage.write(*initVirtMem);
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//Setup the auxilliary vectors. These will already have endian conversion.
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//Auxilliary vectors are loaded only for elf formatted executables.
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auto *elfObject = dynamic_cast<loader::ElfObject *>(objFile);
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if (elfObject) {
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IntType features = HWCAP_FEATURE_32;
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// Check if running in 64-bit mode
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if (is64bit)
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features |= HWCAP_FEATURE_64;
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// Check if running in little endian mode
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if (isLittleEndian)
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features |= HWCAP_FEATURE_PPC_LE | HWCAP_FEATURE_TRUE_LE;
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//Bits which describe the system hardware capabilities
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//XXX Figure out what these should be
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auxv.emplace_back(gem5::auxv::Hwcap, features);
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//The system page size
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auxv.emplace_back(gem5::auxv::Pagesz, pageSize);
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//Frequency at which times() increments
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auxv.emplace_back(gem5::auxv::Clktck, 0x64);
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// For statically linked executables, this is the virtual address of
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// the program header tables if they appear in the executable image
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auxv.emplace_back(gem5::auxv::Phdr, elfObject->programHeaderTable());
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// This is the size of a program header entry from the elf file.
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auxv.emplace_back(gem5::auxv::Phent, elfObject->programHeaderSize());
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// This is the number of program headers from the original elf file.
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auxv.emplace_back(gem5::auxv::Phnum, elfObject->programHeaderCount());
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// This is the base address of the ELF interpreter; it should be
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// zero for static executables or contain the base address for
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// dynamic executables.
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auxv.emplace_back(gem5::auxv::Base, getBias());
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//XXX Figure out what this should be.
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auxv.emplace_back(gem5::auxv::Flags, 0);
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//The entry point to the program
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auxv.emplace_back(gem5::auxv::Entry, objFile->entryPoint());
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//Different user and group IDs
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auxv.emplace_back(gem5::auxv::Uid, uid());
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auxv.emplace_back(gem5::auxv::Euid, euid());
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auxv.emplace_back(gem5::auxv::Gid, gid());
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auxv.emplace_back(gem5::auxv::Egid, egid());
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//Whether to enable "secure mode" in the executable
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auxv.emplace_back(gem5::auxv::Secure, 0);
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//The address of 16 "random" bytes
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auxv.emplace_back(gem5::auxv::Random, 0);
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//The filename of the program
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auxv.emplace_back(gem5::auxv::Execfn, 0);
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//The string "v51" with unknown meaning
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auxv.emplace_back(gem5::auxv::Platform, 0);
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}
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//Figure out how big the initial stack nedes to be
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// A sentry NULL void pointer at the top of the stack.
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int sentry_size = intSize;
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std::string platform = "v51";
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int platform_size = platform.size() + 1;
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// The aux vectors are put on the stack in two groups. The first group are
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// the vectors that are generated as the elf is loaded. The second group
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// are the ones that were computed ahead of time and include the platform
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// string.
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int aux_data_size = filename.size() + 1;
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const int numRandomBytes = 16;
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aux_data_size += numRandomBytes;
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int env_data_size = 0;
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for (int i = 0; i < envp.size(); ++i) {
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env_data_size += envp[i].size() + 1;
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}
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int arg_data_size = 0;
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for (int i = 0; i < argv.size(); ++i) {
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arg_data_size += argv[i].size() + 1;
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}
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int info_block_size =
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sentry_size + env_data_size + arg_data_size +
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aux_data_size + platform_size;
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//Each auxilliary vector is two 4 byte words
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int aux_array_size = intSize * 2 * (auxv.size() + 1);
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int envp_array_size = intSize * (envp.size() + 1);
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int argv_array_size = intSize * (argv.size() + 1);
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int argc_size = intSize;
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//Figure out the size of the contents of the actual initial frame
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int frame_size =
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info_block_size +
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aux_array_size +
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envp_array_size +
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argv_array_size +
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argc_size;
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//There needs to be padding after the auxiliary vector data so that the
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//very bottom of the stack is aligned properly.
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int partial_size = frame_size;
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int aligned_partial_size = roundUp(partial_size, align);
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int aux_padding = aligned_partial_size - partial_size;
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int space_needed = frame_size + aux_padding;
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Addr stack_min = memState->getStackBase() - space_needed;
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stack_min = roundDown(stack_min, align);
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memState->setStackSize(memState->getStackBase() - stack_min);
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// map memory
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memState->mapRegion(roundDown(stack_min, pageSize),
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roundUp(memState->getStackSize(), pageSize), "stack");
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// map out initial stack contents
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IntType sentry_base = memState->getStackBase() - sentry_size;
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IntType aux_data_base = sentry_base - aux_data_size;
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IntType env_data_base = aux_data_base - env_data_size;
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IntType arg_data_base = env_data_base - arg_data_size;
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IntType platform_base = arg_data_base - platform_size;
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IntType auxv_array_base = platform_base - aux_array_size - aux_padding;
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IntType envp_array_base = auxv_array_base - envp_array_size;
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IntType argv_array_base = envp_array_base - argv_array_size;
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IntType argc_base = argv_array_base - argc_size;
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DPRINTF(Stack, "The addresses of items on the initial stack:\n");
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DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
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DPRINTF(Stack, "0x%x - env data\n", env_data_base);
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DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
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DPRINTF(Stack, "0x%x - platform base\n", platform_base);
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DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
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DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
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DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
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DPRINTF(Stack, "0x%x - argc \n", argc_base);
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DPRINTF(Stack, "0x%x - stack min\n", stack_min);
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// write contents to stack
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// figure out argc
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IntType argc = argv.size();
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IntType guestArgc = htog(argc, byteOrder);
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//Write out the sentry void *
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IntType sentry_NULL = 0;
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initVirtMem->writeBlob(sentry_base, &sentry_NULL, sentry_size);
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//Fix up the aux vectors which point to other data
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for (int i = auxv.size() - 1; i >= 0; i--) {
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if (auxv[i].type == gem5::auxv::Platform) {
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auxv[i].val = platform_base;
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initVirtMem->writeString(platform_base, platform.c_str());
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} else if (auxv[i].type == gem5::auxv::Execfn) {
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auxv[i].val = aux_data_base + numRandomBytes;
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initVirtMem->writeString(aux_data_base, filename.c_str());
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} else if (auxv[i].type == gem5::auxv::Random) {
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auxv[i].val = aux_data_base;
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}
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}
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//Copy the aux stuff
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Addr auxv_array_end = auxv_array_base;
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for (const auto &aux: auxv) {
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initVirtMem->write(auxv_array_end, aux, byteOrder);
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auxv_array_end += sizeof(aux);
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}
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//Write out the terminating zeroed auxilliary vector
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const gem5::auxv::AuxVector<uint64_t> zero(0, 0);
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initVirtMem->write(auxv_array_end, zero);
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auxv_array_end += sizeof(zero);
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copyStringArray(envp, envp_array_base, env_data_base,
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byteOrder, *initVirtMem);
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copyStringArray(argv, argv_array_base, arg_data_base,
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byteOrder, *initVirtMem);
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initVirtMem->writeBlob(argc_base, &guestArgc, intSize);
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ThreadContext *tc = system->threads[contextIds[0]];
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//Set the stack pointer register
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tc->setIntReg(StackPointerReg, stack_min);
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//Reset the special-purpose registers
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for (int i = 0; i < NumIntSpecialRegs; i++)
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tc->setIntReg(NumIntArchRegs + i, 0);
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//Set the machine status for a typical userspace
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Msr msr = 0;
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msr.sf = is64bit;
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msr.hv = 1;
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msr.ee = 1;
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msr.pr = 1;
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msr.me = 1;
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msr.ir = 1;
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msr.dr = 1;
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msr.ri = 1;
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msr.le = isLittleEndian;
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tc->setIntReg(INTREG_MSR, msr);
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auto pc = tc->pcState();
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pc.set(getStartPC());
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pc.byteOrder(byteOrder);
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tc->pcState(pc);
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//Align the "stack_min" to a page boundary.
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memState->setStackMin(roundDown(stack_min, pageSize));
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}
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} // namespace gem5
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