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8a6723e0380bf501e305fb2dd72f0e9079f158b2
gem5/src/arch
History
Gabe Black 8a6723e038 X86: Make the apic version register work.
2008-06-12 00:53:37 -04:00
..
alpha
TLB: Make a TLB base class and put a virtual demapPage function in it.
2008-02-26 23:38:51 -05:00
mips
SCons: Fixing SCons bug 2006 issues for non-alpha ISAs
2008-05-20 14:04:53 -04:00
sparc
SCons: Fixing SCons bug 2006 issues for non-alpha ISAs
2008-05-20 14:04:53 -04:00
x86
X86: Make the apic version register work.
2008-06-12 00:53:37 -04:00
isa_parser.py
Get MIPS simple regression working. Take out unecessary functions "setShadowSet", "CacheOp"
2007-11-15 03:10:41 -05:00
isa_specific.hh
Add base ARM code to M5
2008-02-05 23:44:13 -05:00
micro_asm_test.py
Add a second section to make sure the ROM is extended properly.
2007-05-31 22:21:21 +00:00
micro_asm.py
Microassembler: Pass the actual mnemonic used to the macroop add_micro function
2007-08-31 22:26:02 -07:00
SConscript
ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs.
2007-11-08 18:51:50 -08:00
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