Gabe Black c9a27d85b9 Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.

2009-07-08 23:02:22 -07:00

..

resources

Registers: Get rid of the float register width parameter.

2009-07-08 23:02:20 -07:00

comm.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

cpu.cc

Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.

2009-07-08 23:02:22 -07:00

cpu.hh

Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.

2009-07-08 23:02:22 -07:00

first_stage.cc

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

first_stage.hh

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

inorder_cpu_builder.cc

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

inorder_dyn_inst.cc

Registers: Get rid of the float register width parameter.

2009-07-08 23:02:20 -07:00

inorder_dyn_inst.hh

Registers: Get rid of the float register width parameter.

2009-07-08 23:02:20 -07:00

inorder_trace.cc

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

inorder_trace.hh

includes: sort includes again

2009-05-17 14:34:52 -07:00

InOrderCPU.py

InOrder didnt have all it's params set to a default value, which is now required for M5 objects; Also, a # of values need to be reset to 0 (or the appropriate value) before we assume they are OK for use.

2009-03-04 13:17:05 -05:00

InOrderTrace.py

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

params.hh

Remove unused functions/comments cluttering up the code.

2009-03-04 13:17:08 -05:00

pipeline_stage.cc

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

pipeline_stage.hh

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

pipeline_traits.5stage.cc

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

pipeline_traits.5stage.hh

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

pipeline_traits.9stage.cc

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

pipeline_traits.9stage.hh

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

pipeline_traits.9stage.smt2.cc

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

pipeline_traits.9stage.smt2.hh

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

pipeline_traits.cc

inorder-tlb-cunit: merge the TLB as implicit to any memory access

2009-05-12 15:01:16 -04:00

pipeline_traits.hh

types: clean up types, especially signed vs unsigned

2009-06-04 23:21:12 -07:00

reg_dep_map.cc

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

reg_dep_map.hh

InOrder: Import new inorder CPU model from MIPS.

2009-02-10 15:49:29 -08:00

resource_pool.9stage.cc

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

resource_pool.cc

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

resource_pool.hh

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

resource.cc

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

resource.hh

types: add a type for thread IDs and try to use it everywhere

2009-05-26 09:23:13 -07:00

SConscript

inorder-tlb-cunit: merge the TLB as implicit to any memory access

2009-05-12 15:01:16 -04:00

SConsopts

cpus: add InOrderCPU to default build

2009-05-12 20:55:21 -04:00

thread_context.cc

Registers: Get rid of the float register width parameter.

2009-07-08 23:02:20 -07:00

thread_context.hh

Registers: Get rid of the float register width parameter.

2009-07-08 23:02:20 -07:00

thread_state.hh

Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.

2009-07-08 23:02:22 -07:00