--HG-- rename : src/dev/x86/south_bridge/SouthBridge.py => src/dev/x86/SouthBridge.py rename : src/dev/x86/south_bridge/south_bridge.cc => src/dev/x86/south_bridge.cc rename : src/dev/x86/south_bridge/south_bridge.hh => src/dev/x86/south_bridge.hh
57 lines
2.1 KiB
Python
57 lines
2.1 KiB
Python
# -*- mode:python -*-
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# Copyright (c) 2006 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabe Black
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Import('*')
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if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
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SimObject('PC.py')
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Source('pc.cc')
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SimObject('SouthBridge.py')
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Source('south_bridge.cc')
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SimObject('Cmos.py')
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Source('cmos.cc')
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TraceFlag('CMOS', 'Accesses to CMOS devices')
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SimObject('I8259.py')
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Source('i8259.cc')
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TraceFlag('I8259', 'Accesses to the I8259 PIC devices')
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SimObject('I8254.py')
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Source('i8254.cc')
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SimObject('PcSpeaker.py')
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Source('speaker.cc')
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TraceFlag('PcSpeaker')
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SimObject('X86IntPin.py')
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Source('intdev.cc')
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