Derek Christ
803f9f5aa7
Add DRAMSys as a new AbstractMemorySystem to the gem5 stdlib.
Also, provide convenient subclasses with predefined DRAMSys
configurations.
Add two new stdlib examples:
- dramsys-traffic.py: Demonstrates the usage of DRAMSys
using the stdlib TrafficGenerators
- arm-hello-dramsys.py: A variant of the arm-hello.py
script that uses DRAMSys as it's memory.
These DRAMSys memory components are only compiled into the standard
library if DRAMSys is not compiled into gem5.
Change-Id: I9db87c41fbd9c28bc44e9d6bde13fc225dc16be9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/62914
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
63 lines
2.6 KiB
Python
63 lines
2.6 KiB
Python
# Copyright (c) 2023 The Regents of the University of California
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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"""
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This script is used for running a traffic generator connected to the
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DRAMSys simulator.
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**Important Note**: DRAMSys must be compiled into the gem5 binary to use the
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DRRAMSys simulator. Please consult 'ext/dramsys/README' on how to compile
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correctly. If this is not done correctly this script will run with error.
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"""
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import m5
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from gem5.components.memory import DRAMSysMem
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from gem5.components.boards.test_board import TestBoard
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from gem5.components.processors.linear_generator import LinearGenerator
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from m5.objects import Root
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memory = DRAMSysMem(
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configuration="ext/dramsys/DRAMSys/DRAMSys/"
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"library/resources/simulations/ddr4-example.json",
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resource_directory="ext/dramsys/DRAMSys/DRAMSys/library/resources",
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recordable=True,
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size="4GB",
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)
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generator = LinearGenerator(
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duration="250us",
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rate="40GB/s",
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num_cores=1,
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max_addr=memory.get_size(),
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)
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board = TestBoard(
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clk_freq="3GHz", generator=generator, memory=memory, cache_hierarchy=None
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)
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root = Root(full_system=False, system=board)
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board._pre_instantiate()
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m5.instantiate()
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generator.start_traffic()
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exit_event = m5.simulate()
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