This gets rid of the requirement to only modify one byte register at a time, and builds some structure around individual DMA channels. The one small feature of the i8237 that was implemented is still implemented, but now with a method of the i8237. Change-Id: Ibc2b2d75f2a3b860da3f28ae649c6f1a099bdf7d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36815 Reviewed-by: Matthew Poremba <matthew.poremba@amd.com> Maintainer: Gabe Black <gabe.black@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
165 lines
4.9 KiB
C++
165 lines
4.9 KiB
C++
/*
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* Copyright (c) 2008 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "dev/x86/i8237.hh"
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#include "base/cprintf.hh"
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#include "mem/packet.hh"
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#include "mem/packet_access.hh"
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namespace X86ISA
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{
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namespace
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{
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I8237::Register::ReadFunc
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readUnimpl(const std::string &label)
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{
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return [label](I8237::Register ®) -> uint8_t {
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panic("Read from i8237 %s unimplemented.", label);
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};
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}
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I8237::Register::WriteFunc
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writeUnimpl(const std::string &label)
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{
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return [label](I8237::Register ®, const uint8_t &value) {
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panic("Write to i8237 %s unimplemented.", label);
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};
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}
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} // anonymous namespace
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I8237::Channel::ChannelAddrReg::ChannelAddrReg(Channel &channel) :
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Register(csprintf("channel %d current address", channel.number))
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{
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reader(readUnimpl(name()));
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writer(writeUnimpl(name()));
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}
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I8237::Channel::ChannelRemainingReg::ChannelRemainingReg(Channel &channel) :
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Register(csprintf("channel %d remaining word count", channel.number))
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{
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reader(readUnimpl(name()));
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writer(writeUnimpl(name()));
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}
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I8237::WriteOnlyReg::WriteOnlyReg(const std::string &new_name, Addr offset) :
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Register(new_name)
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{
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reader([offset](I8237::Register ®) -> uint8_t {
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panic("Illegal read from i8237 register %d.", offset);
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});
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}
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I8237::I8237(const Params &p) : BasicPioDevice(p, 16), latency(p.pio_latency),
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regs("registers", pioAddr), channels{{{0}, {1}, {2}, {3}}},
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statusCommandReg("status/command"),
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requestReg("request", 0x9),
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setMaskBitReg("set mask bit", 0xa),
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modeReg("mode", 0xb),
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clearFlipFlopReg("clear flip-flop", 0xc),
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temporaryMasterClearReg("temporary/maskter clear"),
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clearMaskReg("clear mask", 0xe),
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writeMaskReg("write mask", 0xf)
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{
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// Add the channel address and remaining registers.
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for (auto &channel: channels)
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regs.addRegisters({ channel.addrReg, channel.remainingReg });
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// Add the other registers individually.
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regs.addRegisters({
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statusCommandReg.
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reader(readUnimpl("status register")).
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writer(writeUnimpl("command register")),
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requestReg.
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writer(writeUnimpl("request register")),
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setMaskBitReg.
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writer(this, &I8237::setMaskBit),
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modeReg.
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writer(writeUnimpl("mode register")),
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clearFlipFlopReg.
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writer(writeUnimpl("clear LSB/MSB flip-flop register")),
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temporaryMasterClearReg.
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reader(readUnimpl("temporary register")).
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writer(writeUnimpl("master clear register")),
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clearMaskReg.
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writer(writeUnimpl("clear mask register")),
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writeMaskReg.
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writer(writeUnimpl("write all mask register bits"))
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});
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}
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void
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I8237::setMaskBit(Register ®, const uint8_t &command)
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{
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uint8_t select = bits(command, 1, 0);
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uint8_t bitVal = bits(command, 2);
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if (!bitVal)
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panic("Turning on i8237 channels unimplemented.");
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replaceBits(maskReg, select, bitVal);
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}
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Tick
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I8237::read(PacketPtr pkt)
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{
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regs.read(pkt->getAddr(), pkt->getPtr<void>(), pkt->getSize());
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pkt->makeAtomicResponse();
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return latency;
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}
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Tick
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I8237::write(PacketPtr pkt)
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{
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regs.write(pkt->getAddr(), pkt->getPtr<void>(), pkt->getSize());
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pkt->makeAtomicResponse();
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return latency;
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}
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void
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I8237::serialize(CheckpointOut &cp) const
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{
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SERIALIZE_SCALAR(maskReg);
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}
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void
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I8237::unserialize(CheckpointIn &cp)
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{
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UNSERIALIZE_SCALAR(maskReg);
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}
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} // namespace X86ISA
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