53009f9e69
This commit adds RISC-V Zfh 1.0 (half-precision IEEE 754 binary16 floating point) extension to gem5. Include the following commands: * FLH / FSH * FMADD.H / FMSUB.H / FNMSUB.H / FNMADD.H * FADD.H / FSUB.H / FMUL.H / FDIV.H * FSQRT.H * FSGNJ.H / FSGNJN.H / FSGNJX.H * FMIN.H / FMAX.H * FCVT.S.H / FCVT.H.S * FCVT.D.H / FCVT.H.D * FCVT.W.H / FCVT.H.W * FCVT.WU.H / FCVT.H.WU * FMV.X.H / FMV.H.X * FEQ.H / FLT.H / FLE.H * FCLASS.H * FCVT.L.H / FCVT.H.L * FCVT.LU.H / FCVT.H.LU Change-Id: Id7870fdfa1aa8b840706c3ba2cab8eeaf008880f Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/60029 Maintainer: Jason Lowe-Power <power.jg@gmail.com> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
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#include <stdbool.h>
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#include <stdint.h>
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#include "platform.h"
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#include "internals.h"
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#include "specialize.h"
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#include "softfloat.h"
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uint_fast16_t f16_classify( float16_t a )
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{
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union ui16_f16 uA;
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uint_fast16_t uiA;
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uA.f = a;
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uiA = uA.ui;
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uint_fast16_t infOrNaN = expF16UI( uiA ) == 0x1F;
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uint_fast16_t subnormalOrZero = expF16UI( uiA ) == 0;
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bool sign = signF16UI( uiA );
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bool fracZero = fracF16UI( uiA ) == 0;
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bool isNaN = isNaNF16UI( uiA );
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bool isSNaN = softfloat_isSigNaNF16UI( uiA );
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return
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( sign && infOrNaN && fracZero ) << 0 |
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( sign && !infOrNaN && !subnormalOrZero ) << 1 |
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( sign && subnormalOrZero && !fracZero ) << 2 |
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( sign && subnormalOrZero && fracZero ) << 3 |
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( !sign && infOrNaN && fracZero ) << 7 |
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( !sign && !infOrNaN && !subnormalOrZero ) << 6 |
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( !sign && subnormalOrZero && !fracZero ) << 5 |
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( !sign && subnormalOrZero && fracZero ) << 4 |
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( isNaN && isSNaN ) << 8 |
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( isNaN && !isSNaN ) << 9;
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}
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