Kevin Lim 7df1412ccd Undo changes to instruction flags that has caused statistics to change in regressions. ...

This temporarily will break the O3 and Ozone CPU models.  Updates to fix them will be coming soon.

arch/alpha/isa/decoder.isa:
    Undo changes to instruction flags that has caused statistics to change in regressions.

--HG--
extra : convert_revision : c0fa9d55a22cae7c4f02d388870565b205d6fba3

2006-05-22 16:01:25 -04:00

..

alpha

Undo changes to instruction flags that has caused statistics to change in regressions.

2006-05-22 16:01:25 -04:00

mips

last changes before big merge

2006-03-09 03:27:51 -05:00

sparc

fix merging issues

2006-03-09 16:17:10 -05:00

isa_parser.py

Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.

2006-03-03 15:28:25 -05:00

isa_specific.hh

Auto-generate arch/foo.hh "switch headers" in scons.

2006-02-22 22:22:06 -05:00

SConscript

Backport ISA scanner fix from newmem to work with

2006-05-17 07:05:27 -04:00