7dbc5cd85a
Change-Id: I899bd4d04ad1cbf5ab32d57df88e2a146d2e2e4e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25455 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
89 lines
3.0 KiB
Makefile
89 lines
3.0 KiB
Makefile
# Copyright (c) 2015-2016, 2019-2020 ARM Limited
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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CPP?=cpp
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DTC?=dtc
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DTC_CPP_FLAGS=-nostdinc -undef
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# $(1) is the prefix of DTB files
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NUM_CPUS := 1 2 4 8 16
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CREATE_TARGET=$(foreach n, $(NUM_CPUS), $(1)_$(n)cpu.dtb)
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TARGET_PREFIX=\
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armv7_gem5_v1 \
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armv8_gem5_v1 \
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armv8_gem5_v2
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TARGETS=\
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$(foreach prefix, $(TARGET_PREFIX), $(call CREATE_TARGET, $(prefix))) \
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armv8_gem5_v1_big_little_2_2.dtb \
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armv8_gem5_v1_big_little_2_4.dtb \
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armv8_gem5_v2_big_little_2_2.dtb \
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armv8_gem5_v2_big_little_2_4.dtb
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VEXPRESS_GEM5_V1_DTSIS=\
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platforms/vexpress_gem5_v1.dtsi \
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platforms/vexpress_gem5_v1_base.dtsi
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VEXPRESS_GEM5_V2_DTSIS=\
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platforms/vexpress_gem5_v2.dtsi \
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platforms/vexpress_gem5_v2_base.dtsi
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GEN_DTS=mkdir -p .gen; \
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$(CPP) -x assembler-with-cpp \
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$(DTC_CPP_FLAGS) \
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-DCONF_PLATFORM=\"../platforms/$(1)\" \
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-DCONF_CPUS=$(2) \
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-o $@ $<
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all: $(TARGETS)
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.gen/armv7_gem5_v1_%cpu.dts: armv7.dts $(VEXPRESS_GEM5_V1_DTSIS)
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$(call GEN_DTS,vexpress_gem5_v1.dtsi,$*)
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.gen/armv8_gem5_v1_%cpu.dts: armv8.dts $(VEXPRESS_GEM5_V1_DTSIS)
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$(call GEN_DTS,vexpress_gem5_v1.dtsi,$*)
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.gen/armv8_gem5_v2_%cpu.dts: armv8.dts $(VEXPRESS_GEM5_V2_DTSIS)
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$(call GEN_DTS,vexpress_gem5_v2.dtsi,$*)
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.gen/armv8_gem5_v1_big_little%.dts: armv8_big_little.dts \
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$(VEXPRESS_GEM5_V1_DTSIS)
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$(call GEN_DTS,vexpress_gem5_v1.dtsi,$*)
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.gen/armv8_gem5_v2_big_little%.dts: armv8_big_little.dts \
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$(VEXPRESS_GEM5_V2_DTSIS)
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$(call GEN_DTS,vexpress_gem5_v2.dtsi,$*)
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%.dtb: .gen/%.dts
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$(DTC) -I dts -O dtb -o $@ $<
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clean:
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$(RM) -r .gen
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$(RM) *.dtb
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