bdb2820218
Change-Id: I0907a6f1ada3038305c2d83a350a8d435ac657ba Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25403 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
89 lines
3.5 KiB
C++
89 lines
3.5 KiB
C++
/*
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* Copyright (c) 2013, 2018-2019 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "dev/arm/smmu_v3_cmdexec.hh"
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#include "base/bitfield.hh"
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#include "dev/arm/smmu_v3.hh"
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void
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SMMUCommandExecProcess::main(Yield &yield)
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{
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SMMUAction a;
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a.type = ACTION_INITIAL_NOP;
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a.pkt = NULL;
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a.ifc = nullptr;
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a.delay = 0;
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yield(a);
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while (true) {
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busy = true;
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while (true) {
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// Masking depending on CMDQ_BASE.LOG2SIZE (log(number of
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// queue entries)). Example: a value of 0b101 (32 entries)
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// generates a 0b11111 mask.
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int size_mask = mask(
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smmu.regs.cmdq_base & Q_BASE_SIZE_MASK);
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// In this case the wrap bit is considered (+1)
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int size_mask_wrap = mask(
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(smmu.regs.cmdq_base & Q_BASE_SIZE_MASK) + 1);
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if ((smmu.regs.cmdq_cons & size_mask_wrap) ==
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(smmu.regs.cmdq_prod & size_mask_wrap))
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break; // command queue empty
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Addr cmd_addr =
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(smmu.regs.cmdq_base & Q_BASE_ADDR_MASK) +
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(smmu.regs.cmdq_cons & size_mask) * sizeof(SMMUCommand);
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// This deliberately resets the error field in cmdq_cons!
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smmu.regs.cmdq_cons = (smmu.regs.cmdq_cons + 1) & size_mask_wrap;
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doRead(yield, cmd_addr, &cmd, sizeof(SMMUCommand));
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smmu.processCommand(cmd);
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}
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busy = false;
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// No more commands to process, signal the SMMU as drained
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smmu.signalDrainDone();
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doSleep(yield);
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}
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}
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