Gabe Black 7abba53747 Moving towards compilation. ...

arch/sparc/isa/decoder.isa:
    Fixed comments so they don't comment out the ending braces of the format specifier.

--HG--
extra : convert_revision : 3f037c0a17abd0dff71d22fdcd95959c3670e88a

2006-03-28 15:13:57 -05:00

..

alpha

Merge m5.eecs.umich.edu:/bk/newmem

2006-03-16 14:08:31 -05:00

mips

fix to LiveProcess (this change got deleted somehow)

2006-03-16 19:01:09 -05:00

sparc

Moving towards compilation.

2006-03-28 15:13:57 -05:00

isa_parser.py

Changed the floating point register file into a class with appropriate accessor functions. The width of the floating point register to access can be specified, and if not, it will be accessed at its "natural" width. That is, the width of each individual register. Also, the functions which access the bit representation of floating point registers can use the blahblahBits functions now instead of blahblahInt.

2006-03-14 15:55:00 -05:00

isa_specific.hh

Minor Sconscript edit ... mips decoder changes ... initialize NNPC and output fault name in simple cpu

2006-03-14 18:28:51 -05:00

SConscript

Moved registerfile.hh to regfile.hh

2006-03-14 16:05:44 -05:00