This patch fixes the problem during checkpoing where the mempool is not restored, but using only the one specified in the config file as a new execution. In order to fix that this changes modifyies the serialize/unserialize functions for mempools and create new funcionts on se_workload to make sure mempools ends up in the m5.cpt. We change as well the unserialize mempool function to update according the checkpoint file so the execution starts with the same free pages and free pointers. JIRA: https://gem5.atlassian.net/browse/GEM5-1191 Change-Id: I289bf91eb4f01d9c01a31a39b968e30f8b8d2bdc Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/56969 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
100 lines
3.4 KiB
C++
100 lines
3.4 KiB
C++
/*
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* Copyright 2020 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __SIM_SE_WORKLOAD_HH__
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#define __SIM_SE_WORKLOAD_HH__
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#include "params/SEWorkload.hh"
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#include "sim/mem_pool.hh"
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#include "sim/workload.hh"
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namespace gem5
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{
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class SEWorkload : public Workload
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{
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protected:
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/** Memory allocation objects for all physical memories in the system. */
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MemPools memPools;
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public:
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using Params = SEWorkloadParams;
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SEWorkload(const Params &p, Addr page_shift=0);
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void setSystem(System *sys) override;
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Addr
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getEntry() const override
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{
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// This object represents the OS, not the individual processes running
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// within it.
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panic("No workload entry point for syscall emulation mode.");
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}
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loader::Arch
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getArch() const override
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{
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// ISA specific subclasses should implement this method.
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// This implemenetation is just to avoid having to implement those for
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// now, and will be removed in the future.
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panic("SEWorkload::getArch() not implemented.");
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}
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const loader::SymbolTable &
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symtab(ThreadContext *) override
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{
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// This object represents the OS, not the individual processes running
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// within it.
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panic("No workload symbol table for syscall emulation mode.");
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}
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bool
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insertSymbol(const loader::Symbol &symbol) override
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{
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// This object represents the OS, not the individual processes running
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// within it.
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panic("No workload symbol table for syscall emulation mode.");
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}
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void serialize(CheckpointOut &cp) const override;
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void unserialize(CheckpointIn &cp) override;
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void syscall(ThreadContext *tc) override;
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// For now, assume the only type of events are system calls.
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void event(ThreadContext *tc) override { syscall(tc); }
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Addr allocPhysPages(int npages, int pool_id=0);
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Addr memSize(int pool_id=0) const;
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Addr freeMemSize(int pool_id=0) const;
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};
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} // namespace gem5
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#endif // __SIM_SE_WORKLOAD_HH__
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