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gem5/src/arch/alpha
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Andreas Sandberg 7df73abd71 arch-alpha: Add missing overrides 
Change-Id: I3a52fcdb449c7df1612466270aa2c9b0a0f3afef
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/4281
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-08-30 16:26:19 +00:00
..
freebsd
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
isa
arch: ISA parser additions of vector registers
2017-07-05 14:43:49 +00:00
linux
syscall_emul: [PATCH 15/22] add clone/execve for threading and multiprocess simulations
2017-02-27 14:10:15 -05:00
AlphaInterrupts.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
AlphaISA.py
arch, cpu: Add support for flattening misc register indexes.
2014-01-24 15:29:30 -06:00
AlphaSystem.py
alpha: Remove ALPHA tru64 support and associated tests
2016-11-17 04:54:14 -05:00
AlphaTLB.py
sim: Include object header files in SWIG interfaces
2012-11-02 11:32:01 -05:00
aout_machdep.h
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
2008-09-10 14:26:15 -04:00
decoder.cc
ISA,CPU: Generalize and split out the components of the decode cache.
2012-05-26 13:45:12 -07:00
decoder.hh
isa: Add parameter to pick different decoder inside ISA
2015-10-09 14:50:54 -05:00
ecoff_machdep.h
…
ev5.cc
sim: don't ignore SIG_TRAP
2016-01-17 18:27:46 -08:00
ev5.hh
Alpha: Pull the MiscRegFile fully into the ISA object.
2009-07-08 23:02:22 -07:00
faults.cc
arch: ISA parser additions of vector registers
2017-07-05 14:43:49 +00:00
faults.hh
arch: ISA parser additions of vector registers
2017-07-05 14:43:49 +00:00
idle_event.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
idle_event.hh
…
interrupts.cc
Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
2008-10-12 09:09:56 -07:00
interrupts.hh
isa: Modify get/check interrupt routines
2016-07-21 17:19:15 +01:00
ipr.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
ipr.hh
style: Make a style pass over the whole arch/alpha directory.
2008-09-27 21:03:48 -07:00
isa_traits.hh
arch: Cleanup unused ISA traits constants
2014-09-03 07:42:21 -04:00
isa.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
isa.hh
cpu: Added interface for vector reg file
2017-07-05 14:43:49 +00:00
kernel_stats.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
kernel_stats.hh
misc: Remove redundant compiler-specific defines
2015-10-12 04:07:59 -04:00
locked_mem.hh
cpu: Always mask the snoop address when performing lock check
2014-12-02 06:08:00 -05:00
microcode_rom.hh
CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
2008-10-12 15:59:21 -07:00
mmapped_ipr.hh
arch: Add support for m5ops using mmapped IPRs
2013-09-30 12:20:43 +02:00
mt.hh
clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6
2012-04-14 05:43:31 -04:00
osfpal.cc
style: Make a style pass over the whole arch/alpha directory.
2008-09-27 21:03:48 -07:00
osfpal.hh
style: Make a style pass over the whole arch/alpha directory.
2008-09-27 21:03:48 -07:00
pagetable.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
pagetable.hh
misc: Remove redundant compiler-specific defines
2015-10-12 04:07:59 -04:00
process.cc
syscall-emul: Move memState into its own file
2017-03-09 19:19:38 +00:00
process.hh
syscall_emul: [patch 5/22] remove LiveProcess class and use Process instead
2016-11-09 14:27:40 -06:00
pseudo_inst.hh
kvm, x86: Adding support for SE mode execution
2014-11-23 18:01:08 -08:00
registers.hh
cpu: Added interface for vector reg file
2017-07-05 14:43:49 +00:00
regredir.cc
SE/FS: Get rid of uses of FULL_SYSTEM in Alpha.
2011-11-01 04:01:14 -07:00
regredir.hh
Registers: Add a registers.hh file as an ISA switched header.
2009-07-08 23:02:21 -07:00
remote_gdb.cc
base: Refactor the GDB code.
2017-05-18 16:48:09 +00:00
remote_gdb.hh
arch-alpha: Add missing overrides
2017-08-30 16:26:19 +00:00
SConscript
alpha: Remove ALPHA tru64 support and associated tests
2016-11-17 04:54:14 -05:00
SConsopts
alpha: get rid of all turbolaser remnants
2009-04-08 22:22:49 -07:00
stacktrace.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
stacktrace.hh
arch: Use const StaticInstPtr references where possible
2014-09-27 09:08:36 -04:00
system.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
system.hh
misc: Add explicit overrides and fix other clang >= 3.5 issues
2015-10-12 04:08:01 -04:00
tlb.cc
stats: Fixing regStats function for some SimObjects
2016-06-06 17:16:43 +01:00
tlb.hh
misc: Add explicit overrides and fix other clang >= 3.5 issues
2015-10-12 04:08:01 -04:00
types.hh
arch: get rid of unused LargestRead typedef
2016-01-17 18:27:46 -08:00
utility.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
utility.hh
scons: Enable -Wextra by default
2016-01-11 05:52:20 -05:00
vtophys.cc
style: [patch 1/22] use /r/3648/ to reorganize includes
2016-11-09 14:27:37 -06:00
vtophys.hh
MEM: Make port proxies use references rather than pointers
2012-02-24 11:45:30 -05:00