Marco Elver 6599dd87c8 ruby: Fix MESI consistency bug ...

Fixes missed forward eviction to CPU. With the O3CPU this can lead to load-load
reordering, as the LQ is never notified of the invalidate.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

2015-06-07 14:02:40 -05:00

..

MESI_Three_Level-L0cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MESI_Three_Level-L1cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MESI_Three_Level-msg.sm

ruby: add a three level MESI protocol.

2014-01-04 00:03:34 -06:00

MESI_Three_Level.slicc

ruby: mesi three level: rename incorrectly named files

2014-02-20 17:27:17 -06:00

MESI_Two_Level-dir.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

MESI_Two_Level-dma.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MESI_Two_Level-L1cache.sm

ruby: Fix MESI consistency bug

2015-06-07 14:02:40 -05:00

MESI_Two_Level-L2cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MESI_Two_Level-msg.sm

ruby: rename MESI_CMP_directory to MESI_Two_Level

2014-01-04 00:03:33 -06:00

MESI_Two_Level.slicc

ruby: rename MESI_CMP_directory to MESI_Two_Level

2014-01-04 00:03:33 -06:00

MI_example-cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MI_example-dir.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

MI_example-dma.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MI_example-msg.sm

ruby: restrict Address to being a type and not a variable name

2013-06-18 16:58:33 -05:00

MI_example.slicc

Protocol: Remove standard one and two level files

2011-11-03 22:52:02 -05:00

MOESI_CMP_directory-dir.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

MOESI_CMP_directory-dma.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_CMP_directory-L1cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_CMP_directory-L2cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_CMP_directory-msg.sm

ruby: restrict Address to being a type and not a variable name

2013-06-18 16:58:33 -05:00

MOESI_CMP_directory.slicc

ruby: record fully busy cycle with in the controller

2013-02-10 21:26:22 -06:00

MOESI_CMP_token-dir.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

MOESI_CMP_token-dma.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_CMP_token-L1cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_CMP_token-L2cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_CMP_token-msg.sm

ruby: restrict Address to being a type and not a variable name

2013-06-18 16:58:33 -05:00

MOESI_CMP_token.slicc

Protocol: Remove standard one and two level files

2011-11-03 22:52:02 -05:00

MOESI_hammer-cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_hammer-dir.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

MOESI_hammer-dma.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

MOESI_hammer-msg.sm

ruby: restrict Address to being a type and not a variable name

2013-06-18 16:58:33 -05:00

MOESI_hammer.slicc

Protocol: Remove standard one and two level files

2011-11-03 22:52:02 -05:00

Network_test-cache.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

Network_test-dir.sm

ruby: coherence protocols: remove data block from dirctory entry

2014-11-06 05:42:20 -06:00

Network_test-msg.sm

ruby: restrict Address to being a type and not a variable name

2013-06-18 16:58:33 -05:00

Network_test.slicc

Remove standard_1level_CMP-protocol.sm include statement from Network

2011-11-22 20:11:18 -05:00

RubySlicc_ComponentMapping.sm

ruby: add a three level MESI protocol.

2014-01-04 00:03:34 -06:00

RubySlicc_Defines.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

RubySlicc_Exports.sm

ruby: remove undefined message size type

2013-09-06 16:21:30 -05:00

RubySlicc_interfaces.slicc

ruby: remove the three files related to profiling

2013-06-24 08:59:08 -05:00

RubySlicc_MemControl.sm

ruby: restrict Address to being a type and not a variable name

2013-06-18 16:58:33 -05:00

RubySlicc_Types.sm

ruby: interface with classic memory controller

2014-11-06 05:42:21 -06:00

RubySlicc_Util.sm

ruby: replace Time with Cycles (final patch in the series)

2013-02-10 21:43:10 -06:00

SConscript

Ruby: Modify Scons so that we can put .sm files in extras

2012-09-12 14:52:04 -05:00

SConsopts

ruby: add a three level MESI protocol.

2014-01-04 00:03:34 -06:00