716c154b51
This will make it possible to connect any of these objects with a named socket, in addition to the usual port numbers. Change-Id: Id441c3628f62d60608a07c5cb697786e33199981 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/69166 Reviewed-by: Jui-min Lee <fcrh@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
101 lines
3.5 KiB
C++
101 lines
3.5 KiB
C++
/* * Copyright 2022 Google, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "arch/arm/fastmodel/remote_gdb.hh"
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#include "arch/arm/fastmodel/iris/thread_context.hh"
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#include "arch/arm/utility.hh"
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#include "base/trace.hh"
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#include "debug/GDBAcc.hh"
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namespace gem5 {
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using namespace ArmISA;
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namespace fastmodel {
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void
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FastmodelRemoteGDB::AArch64GdbRegCache::setRegs(ThreadContext *context) const
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{
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DPRINTF(GDBAcc, "setRegs in remotegdb \n");
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for (int i = 0; i < 31; ++i)
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context->setReg(int_reg::x(i), r.x[i]);
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auto pc_state = context->pcState().as<PCState>();
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pc_state.set(r.pc);
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context->pcState(pc_state);
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context->setMiscRegNoEffect(MISCREG_CPSR, r.cpsr);
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// Update the stack pointer. This should be done after
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// updating CPSR/PSTATE since that might affect how SPX gets
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// mapped.
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context->setReg(int_reg::Spx, r.spx);
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// Remove the vector registers update in FastmodelRemoteGDB since it's not
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// implemented in iris::ThreadContext.
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warn("Skip update vector registers in remotegdb\n");
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context->setMiscRegNoEffect(MISCREG_FPSR, r.fpsr);
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context->setMiscRegNoEffect(MISCREG_FPCR, r.fpcr);
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}
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FastmodelRemoteGDB::FastmodelRemoteGDB(System *_system,
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ListenSocketConfig _listen_config)
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: gem5::ArmISA::RemoteGDB(_system, _listen_config)
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{
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}
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bool
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FastmodelRemoteGDB::readBlob(Addr vaddr, size_t size, char *data)
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{
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auto tc = dynamic_cast<Iris::ThreadContext *>(context());
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panic_if(!tc,
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"FastmodelRemoteGdb can only work on Iris::ThreadContext");
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tc->readMemWithCurrentMsn(vaddr, size, data);
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return true;
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}
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bool
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FastmodelRemoteGDB::writeBlob(Addr vaddr, size_t size, const char *data)
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{
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auto tc = dynamic_cast<Iris::ThreadContext *>(context());
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panic_if(!tc,
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"FastmodelRemoteGdb can only work on Iris::ThreadContext");
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tc->writeMemWithCurrentMsn(vaddr, size, data);
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return true;
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}
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BaseGdbRegCache*
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FastmodelRemoteGDB::gdbRegs()
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{
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if (inAArch64(context()))
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return ®Cache64;
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else
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return ®Cache32;
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}
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} // namespace fastmodel
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} // namespace gem5
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