Boris Shingarov eb778327b3 arch-power: Implement mcrxr ...

Implement the mcrxr instruction (Move to Condition Register from XER
X-form) as defined on p.132 of the green-cloth book:
The contents of XER<0:3> are copied into the Condition Register field
designated by BF.  XER<0:3> are set to zero.

Change-Id: I82ae3d98e1eaf9182e90c0c86afe0f13d4a052e4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37295
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Boris Shingarov <shingarov@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

2020-11-10 15:23:14 +00:00

..

arm

arch,cpu: Enforce using accessors to get at src/destRegIdx.

2020-11-06 00:57:38 +00:00

gcn3

arch-gcn3: Fix operand size reporting for Flat insts

2020-11-06 00:31:52 +00:00

generic

arch: Move many of the generic files outside an NULL guard.

2020-10-29 20:23:35 +00:00

isa_parser

arch,cpu: Enforce using accessors to get at src/destRegIdx.

2020-11-06 00:57:38 +00:00

mips

arch,cpu: Enforce using accessors to get at src/destRegIdx.

2020-11-06 00:57:38 +00:00

null

base, sim, mem, arch: Remove the dummy CPU in NULL

2020-09-14 08:52:40 +00:00

power

arch-power: Implement mcrxr

2020-11-10 15:23:14 +00:00

riscv

arch,cpu: Enforce using accessors to get at src/destRegIdx.

2020-11-06 00:57:38 +00:00

sparc

arch,cpu: Enforce using accessors to get at src/destRegIdx.

2020-11-06 00:57:38 +00:00

x86

arch-x86: include system syscall header in syscall table files

2020-11-07 05:44:21 +00:00

micro_asm_test.py

arch: Delete authors lists from generic arch files.

2020-02-18 03:34:56 +00:00

micro_asm.py

misc: Make exception handling python3 compliant

2020-03-13 14:24:07 +00:00

SConscript

arch,sim: Handle KVM SE page faults with workload events.

2020-10-29 20:23:26 +00:00