6bbb28a5b3
Change-Id: Id3628d34adccf8cc1044195b7209f3b01f061c93 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25454 Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com>
104 lines
4.7 KiB
Python
104 lines
4.7 KiB
Python
# Copyright (c) 2006 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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import m5
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from m5.objects import *
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m5.util.addToPath('../configs/')
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from common import Benchmarks, FSConfig, SysPaths
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test_sys = FSConfig.makeLinuxAlphaSystem('atomic',
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Benchmarks.SysConfig('netperf-stream-client.rcS'))
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test_sys.kernel = SysPaths.binary('vmlinux')
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# Dummy voltage domain for all test_sys clock domains
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test_sys.voltage_domain = VoltageDomain()
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# Create the system clock domain
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test_sys.clk_domain = SrcClockDomain(clock = '1GHz',
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voltage_domain = test_sys.voltage_domain)
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test_sys.cpu = AtomicSimpleCPU(cpu_id=0)
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# create the interrupt controller
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test_sys.cpu.createInterruptController()
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test_sys.cpu.connectAllPorts(test_sys.membus)
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# Create a seperate clock domain for components that should run at
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# CPUs frequency
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test_sys.cpu.clk_domain = SrcClockDomain(clock = '2GHz',
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voltage_domain =
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test_sys.voltage_domain)
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# Create a separate clock domain for Ethernet
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test_sys.tsunami.ethernet.clk_domain = SrcClockDomain(clock = '500MHz',
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voltage_domain =
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test_sys.voltage_domain)
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# In contrast to the other (one-system) Tsunami configurations we do
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# not have an IO cache but instead rely on an IO bridge for accesses
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# from masters on the IO bus to the memory bus
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test_sys.iobridge = Bridge(delay='50ns', ranges = test_sys.mem_ranges)
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test_sys.iobridge.slave = test_sys.iobus.master
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test_sys.iobridge.master = test_sys.membus.slave
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test_sys.physmem = SimpleMemory(range = test_sys.mem_ranges[0])
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test_sys.physmem.port = test_sys.membus.master
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drive_sys = FSConfig.makeLinuxAlphaSystem('atomic',
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Benchmarks.SysConfig('netperf-server.rcS'))
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drive_sys.kernel = SysPaths.binary('vmlinux')
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# Dummy voltage domain for all drive_sys clock domains
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drive_sys.voltage_domain = VoltageDomain()
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# Create the system clock domain
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drive_sys.clk_domain = SrcClockDomain(clock = '1GHz',
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voltage_domain =
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drive_sys.voltage_domain)
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drive_sys.cpu = AtomicSimpleCPU(cpu_id=0)
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# create the interrupt controller
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drive_sys.cpu.createInterruptController()
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drive_sys.cpu.connectAllPorts(drive_sys.membus)
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# Create a seperate clock domain for components that should run at
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# CPUs frequency
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drive_sys.cpu.clk_domain = SrcClockDomain(clock = '4GHz',
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voltage_domain =
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drive_sys.voltage_domain)
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# Create a separate clock domain for Ethernet
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drive_sys.tsunami.ethernet.clk_domain = SrcClockDomain(clock = '500MHz',
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voltage_domain =
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drive_sys.voltage_domain)
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drive_sys.iobridge = Bridge(delay='50ns', ranges = drive_sys.mem_ranges)
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drive_sys.iobridge.slave = drive_sys.iobus.master
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drive_sys.iobridge.master = drive_sys.membus.slave
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drive_sys.physmem = SimpleMemory(range = drive_sys.mem_ranges[0])
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drive_sys.physmem.port = drive_sys.membus.master
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root = FSConfig.makeDualRoot(True, test_sys, drive_sys, "ethertrace")
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maxtick = 199999999
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