Ali Saidi 689cab36c9 *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg ...

--HG--
extra : convert_revision : f799b65f1b2a6bf43605e6870b0f39b473dc492b

2007-03-07 15:04:31 -05:00

..

cpu_builder.cc

Make cpu's capable of having a phase shift

2006-11-14 01:10:36 -05:00

cpu_impl.hh

*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg

2007-03-07 15:04:31 -05:00

cpu.cc

This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world

2006-07-23 13:39:42 -04:00

cpu.hh

*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg

2007-03-07 15:04:31 -05:00

dyn_inst_impl.hh

Fixes to get MIPS_SE to compile.

2006-12-20 22:14:40 -05:00

dyn_inst.cc

This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world

2006-07-23 13:39:42 -04:00

dyn_inst.hh

*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg

2007-03-07 15:04:31 -05:00

impl.hh

This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world

2006-07-23 13:39:42 -04:00

params.hh

This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world

2006-07-23 13:39:42 -04:00

thread_context.cc

This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds, runs, and gets very very close to completing the hello world

2006-07-23 13:39:42 -04:00

thread_context.hh

Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class.

2006-08-11 19:43:10 -04:00