Gabe Black 64bf90dca3 X86: Clear out duplicate TLB entries when adding a new one. ...

It's possible for two page table walks to overlap which will go in the same
place in the TLB's trie. They would land on top of each other, so this change
adds some code which detects if an address already matches an entry and if so
throws away the new one.

2012-04-24 00:48:41 -07:00

..

arch

X86: Clear out duplicate TLB entries when adding a new one.

2012-04-24 00:48:41 -07:00

base

base: Include cassert in trie.hh.

2012-04-22 05:20:44 -07:00

cpu

CPU: Tidy up some formatting and a DPRINTF in the simple CPU base class.

2012-04-15 12:35:49 -07:00

dev

MEM: Remove the Broadcast destination from the packet

2012-04-14 05:45:55 -04:00

doxygen

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kern

MEM: Introduce the master/slave port sub-classes in C++

2012-03-30 09:40:11 -04:00

mem

MEM: Remove the Broadcast destination from the packet

2012-04-14 05:45:55 -04:00

python

Regression: Add ANSI colours to highlight test status

2012-04-14 05:44:27 -04:00

sim

MEM: Separate snoops and normal memory requests/responses

2012-04-14 05:45:07 -04:00

unittest

sim: A trie data structure specifically to speed up paging lookups.

2012-04-14 23:19:34 -07:00

Doxyfile

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SConscript

clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6

2012-04-14 05:43:31 -04:00