Giacomo Travaglini 64b3a741f5 arch-arm: raise/clear IRQ when writing to PMOVSCLR/SET ...

Writing a 1 to the Overflow Flag Status register should trigger an
interrupt raise/clear depending on the register we are currently using
(PMOVSCLR for clearing and PMOVSSET for raising).

Change-Id: I2091456685a245712045cf7a4932ac36b7dded1d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/12531
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

2018-09-28 10:13:05 +00:00

..

arch

arch-arm: raise/clear IRQ when writing to PMOVSCLR/SET

2018-09-28 10:13:05 +00:00

base

base: Avoid dividing by zero in Time::[gs]etTick.

2018-09-11 21:39:28 +00:00

cpu

Fix SConstruct for asan build

2018-09-13 13:57:46 +00:00

dev

dev, arm: fix error class-memaccess with GCC >= 8.1

2018-09-18 16:57:56 +00:00

doc

docs: Fix power model doxygen

2018-04-20 15:59:35 +00:00

doxygen

MEM: Put memory system document into doxygen

2012-09-25 11:49:41 -05:00

gpu-compute

hsail-x86: fix gpu dynamic instruction error

2018-08-17 16:58:05 +00:00

kern

sim-se: Add /sys/devices/system/cpu/online file

2018-03-15 20:45:34 +00:00

learning_gem5

misc: Using smart pointers for memory Requests

2018-06-11 16:55:30 +00:00

mem

mem-ruby: Fix a bug in MessageBuffer randomization

2018-09-24 21:06:38 +00:00

proto

cpu: Stop extracting inst_flags from the machInst.

2018-03-27 10:57:36 +00:00

python

python: Fix call bug in @cxxMethod when override is True

2018-06-28 17:40:26 +00:00

sim

syscall_emul: implement dir-related syscalls

2018-09-19 20:54:04 +00:00

systemc

systemc: Report errors when proc ctrl funcs are called during elab.

2018-09-26 00:04:44 +00:00

unittest

base, mem: Disambiguate if an addr range is contained or overlaps

2018-06-19 14:24:25 +00:00

Doxyfile

misc: Fix BaseCPU doxygen

2018-07-10 16:41:40 +00:00

SConscript

scons: Generalize building binaries.

2018-06-26 00:15:12 +00:00