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60c2d98fc088dea76f0cd67588d4efb2ca557136
gem5/src/arch
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Gabe Black 60c2d98fc0 X86: Implement and attach the BSR and BSF instructions.
--HG--
extra : convert_revision : be7e11980092e5d1baff0e05d4ec910305966908
2008-01-22 00:10:33 -05:00
..
alpha
Add CoreSpecific type to all archs
2007-11-15 14:17:21 -05:00
mips
add back in clobbered MIPS fix for g++ 4.2
2007-11-17 00:02:56 -05:00
sparc
SPARC: Fix a bug where the TLB would match against the wrong entries.
2008-01-01 18:20:08 -05:00
x86
X86: Implement and attach the BSR and BSF instructions.
2008-01-22 00:10:33 -05:00
isa_parser.py
Get MIPS simple regression working. Take out unecessary functions "setShadowSet", "CacheOp"
2007-11-15 03:10:41 -05:00
isa_specific.hh
Add build hooks for x86.
2007-03-03 16:01:48 +00:00
micro_asm_test.py
Add a second section to make sure the ROM is extended properly.
2007-05-31 22:21:21 +00:00
micro_asm.py
Microassembler: Pass the actual mnemonic used to the macroop add_micro function
2007-08-31 22:26:02 -07:00
SConscript
ISA parser: Make the isa parser generate MaxInstSrcRegs and MaxInstDestRegs.
2007-11-08 18:51:50 -08:00
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