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5d67efd21738c938014c14cec845a89b1f97e1c3
gem5/arch
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Kevin Lim 5d67efd217 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs

--HG--
extra : convert_revision : 31c1bcc2c52d88bd5133a2007f9feefa2c04b6aa
2006-03-04 23:37:45 -05:00
..
alpha
Merge ktlim@zizzer:/bk/m5
2006-03-04 23:37:45 -05:00
mips
Filled out the object file loader so it can load object files for several OSs and architectures.
2006-03-04 03:09:23 -05:00
sparc
General small SPARC fixups
2006-03-04 03:16:16 -05:00
isa_parser.py
Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
2006-03-03 15:28:25 -05:00
isa_specific.hh
Auto-generate arch/foo.hh "switch headers" in scons.
2006-02-22 22:22:06 -05:00
SConscript
Filled out the object file loader so it can load object files for several OSs and architectures.
2006-03-04 03:09:23 -05:00
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