Korey Sewell 5cfc5e8080 The first fully coded version of decoder.isa!!!!! ...

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-every MIPS32 ISA is represented with some type
of code block.
-any instruction that doesnt have a code block
would be of format WarnUnimpl. Examples of the
ones I am waiting on further info to implement
are the TLB register insts, memory consistency
instructions (ll,sc,etc.) and software debug
insts.

--HG--
extra : convert_revision : 4a26c72e4fa1f63b8689fe2631a7508daf660969

2006-02-10 03:27:19 -05:00

..

alpha

Moved the alpha isa_desc to conform to the new naming system.

2006-02-08 02:17:47 -05:00

mips

The first fully coded version of decoder.isa!!!!!

2006-02-10 03:27:19 -05:00

sparc

Alot of changes to push towards ISA independence. Highlights are renaming of the isa_desc files, movement of byte_swap.hh into sim, and the creation of arch/isa_traits.hh

2006-02-08 01:03:55 -05:00

isa_parser.py

Some stuff aparently didn't get committed which was from before the new repository was created.

2006-01-24 19:57:17 -05:00