Logo
Explore Help
Sign In
derek/gem5
1
0
Fork 0
You've already forked gem5
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
5ac98a7ec13e5e027cdccfcb3ae031289f629edd
gem5/arch
History
Gabe Black 0cbb43ebb1 Added registerfile.hh and utility.hh
--HG--
extra : convert_revision : f825fcf53e716efc62e541692cb4ed26366abc26
2006-03-11 14:26:34 -05:00
..
alpha
Added registerfile.hh and utility.hh
2006-03-11 14:26:34 -05:00
mips
last changes before big merge
2006-03-09 03:27:51 -05:00
sparc
fix merging issues
2006-03-09 16:17:10 -05:00
isa_parser.py
Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
2006-03-03 15:28:25 -05:00
isa_specific.hh
Auto-generate arch/foo.hh "switch headers" in scons.
2006-02-22 22:22:06 -05:00
SConscript
Work towards factoring isa_traits.hh into smaller, more specialized files.
2006-03-10 19:11:27 -05:00
Powered by Gitea Version: 1.25.4 Page: 95ms Template: 10ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API