This patch essentially rolls back 10518:30e3715c9405 to make RubyPort the parent class of DMASequencer. It removes redundant code and restores some features which were lost when directly inheriting from MemObject. For example, DMASequencer can now communicate to other devices using PIO, which is useful for memmory-mapped communication between multiple DMADevices.
80 lines
2.7 KiB
C++
80 lines
2.7 KiB
C++
/*
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* Copyright (c) 2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
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#define __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
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#include <memory>
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#include <ostream>
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#include "mem/protocol/DMASequencerRequestType.hh"
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#include "mem/ruby/common/DataBlock.hh"
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#include "mem/ruby/system/RubyPort.hh"
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#include "params/DMASequencer.hh"
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struct DMARequest
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{
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uint64_t start_paddr;
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int len;
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bool write;
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int bytes_completed;
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int bytes_issued;
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uint8_t *data;
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PacketPtr pkt;
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};
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class DMASequencer : public RubyPort
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{
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public:
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typedef DMASequencerParams Params;
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DMASequencer(const Params *);
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void init() override;
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/* external interface */
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RequestStatus makeRequest(PacketPtr pkt);
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bool busy() { return m_is_busy;}
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int outstandingCount() const { return (m_is_busy ? 1 : 0); }
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bool isDeadlockEventScheduled() const { return false; }
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void descheduleDeadlockEvent() {}
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/* SLICC callback */
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void dataCallback(const DataBlock & dblk);
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void ackCallback();
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void recordRequestType(DMASequencerRequestType requestType);
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private:
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void issueNext();
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bool m_is_busy;
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uint64_t m_data_block_mask;
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DMARequest active_request;
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};
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#endif // __MEM_RUBY_SYSTEM_DMASEQUENCER_HH__
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