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gem5
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5a0fd8d9dabe5f6786946817eaec59c649a4b550
gem5
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arch
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Korey Sewell
5a0fd8d9da
add explicit support for nop,ssnop, and ehb instructions
...
--HG-- extra : convert_revision : 41151d38cabb6ce0ea81e5d78e4474d8f2ffeb67
2006-03-08 16:53:44 -05:00
..
alpha
Merge gblack@m5.eecs.umich.edu:/bk/multiarch
2006-03-07 04:42:06 -05:00
mips
add explicit support for nop,ssnop, and ehb instructions
2006-03-08 16:53:44 -05:00
sparc
Changed the include paths to take advantage of the os specific directories.
2006-03-07 04:34:21 -05:00
isa_parser.py
Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included.
2006-03-03 15:28:25 -05:00
isa_specific.hh
Auto-generate arch/foo.hh "switch headers" in scons.
2006-02-22 22:22:06 -05:00
SConscript
Filled out the object file loader so it can load object files for several OSs and architectures.
2006-03-04 03:09:23 -05:00