Andreas Hansson 20111ba917 cpu: Ensure timing CPU sinks response before sending new request ...

This patch changes how the timing CPU deals with processing responses,
always scheduling an event, even if it is for the current tick. This
helps to avoid situations where a new request shows up before a
response is finished in the crossbar, and also is more in line with
any realistic behaviour.

2015-02-03 14:25:27 -05:00

..

probes

cpu: commit probe notification on every microop or macroop

2015-01-20 14:15:27 -06:00

atomic.cc

sim: Clean up InstRecord

2015-01-25 07:22:44 -05:00

atomic.hh

alpha,arm,mips,power,x86,cpu,sim: Cleanup activate/deactivate

2014-09-20 17:18:35 -04:00

AtomicSimpleCPU.py

cpu: use probes infrastructure to do simpoint profiling

2014-09-20 17:17:43 -04:00

base.cc

arm: Fixes based on UBSan and static analysis

2014-11-14 03:53:51 -05:00

base.hh

cpu: Remove all notion that we know when the cpu is misspeculating.

2015-01-25 07:22:26 -05:00

BaseSimpleCPU.py

cpu: simple: Add support for using branch predictors

2014-02-09 20:49:28 +01:00

SConscript

scons: rename TraceFlags to DebugFlags

2011-06-02 17:36:21 -07:00

SConsopts

arch, cpu: Factor out the ExecContext into a proper base class

2014-09-03 07:42:22 -04:00

timing.cc

cpu: Ensure timing CPU sinks response before sending new request

2015-02-03 14:25:27 -05:00

timing.hh

mem: Clean up Request initialisation

2015-01-22 05:00:53 -05:00

TimingSimpleCPU.py

cpu: Add CPU metadata om the Python classes

2013-02-15 17:40:08 -05:00